[{"chip":"BM1385","manufacturer":"Bitmain","process_node":"28nm","generation":"Gen 0 (S5\/S7 era)","year":2015,"algorithm":"SHA-256","hashrate_per_chip":"~32 GH\/s","efficiency":"~200 J\/TH","models":"Antminer S5, S7","chips_per_board":"","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"","confidence":"Documented","substitution_note":"First-generation 28nm SHA-256 silicon. Long obsolete; no live cross-substitution path with any later chip.","pair_bonding_note":"Single-generation part; not mixed with later silicon.","counterfeit_note":"Decade-old chips are sometimes re-marked and sold as a newer generation \u2014 verify the package, date code, and on-board chip count against this table before buying any \"S5\/S7-era\" board."},{"chip":"BM1387","manufacturer":"Bitmain","process_node":"16nm","generation":"Gen 1 (S9 family)","year":2017,"algorithm":"SHA-256","hashrate_per_chip":"~75 GH\/s","efficiency":"98 J\/TH","models":"Antminer S9, S9i, S9j, T9+","chips_per_board":"63","voltage_domains":"21","chips_per_domain":"3","domain_voltage":"~0.40 V (per domain)","chip_id":"0x1387","confidence":"Bench-verified","substitution_note":"The whole S9 family \u2014 including the S9 SE (BM1391) and S9j (BM1393) refinements \u2014 reports the same 0x1387 chip ID and speaks the identical BM1387 command\/register surface. Those are silicon-binning \/ process-shrink variants, register-compatible with BM1387 for every wire-format purpose. (Verified: BM1391\/BM1393-vs-BM1387 disambiguation, PR-054.)","pair_bonding_note":"S9-family chips are interchangeable at the protocol layer, but mixing dies of different bins on one board changes the achievable frequency\/voltage envelope \u2014 keep a board single-bin.","counterfeit_note":"The S9 was the most-cloned mining board in history. Re-balled and harvested BM1387 dies are common on the used market. Cross-check the 63-chip \/ 21-domain layout and the U3 PIC (PIC16F1704) before trusting a \"refurbished\" S9 board."},{"chip":"BM1391","manufacturer":"Bitmain","process_node":"7nm","generation":"S9-family refinement","year":2018,"algorithm":"SHA-256","hashrate_per_chip":"~111 GH\/s","efficiency":"57 J\/TH","models":"Antminer S15, T15 (S9 SE in some sources)","chips_per_board":"72","voltage_domains":"12","chips_per_domain":"6","domain_voltage":"~1.53 V (per domain)","chip_id":"0x1387 (shared)","confidence":"Named-only","substitution_note":"A 7nm refinement of the S9 line. The runtime keys it on the same 0x1387 chip ID and shares the BM1387 driver \u2014 it is register-compatible with BM1387, not a separate dispatch identity. The S15\/T15 host attribution is the curated-reference consensus; some firmware corpus rows fold BM1391 under the S9 SE.","pair_bonding_note":"Register-compatible with the S9 family; do not mix BM1391 boards with BM1387 boards in one miner without re-confirming the per-model frequency table.","counterfeit_note":"Less commonly cloned than BM1387, but the same caution applies \u2014 verify the chip ID readback and board geometry rather than trusting a silk-screen mark."},{"chip":"BM1393","manufacturer":"Bitmain","process_node":"7nm","generation":"S9j variant (named-only)","year":2019,"algorithm":"SHA-256","hashrate_per_chip":"~120 GH\/s (S9j class)","efficiency":"~68 J\/TH","models":"Antminer S9j (S9-family refinement)","chips_per_board":"","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1387 (shared)","confidence":"Named-only","substitution_note":"IMPORTANT: BM1393 is an inferred, named-only S9j-family refinement that reports the same 0x1387 chip ID and runs on the shared BM1387 driver \u2014 it is NOT the S17\/T17 chip. The S17\/T17 generation uses the 7nm BM1397 (see below). Older references that list \"BM1393 = S17\/T17\" are incorrect; D-Central corrects that here. (Verified: PR-054 disambiguation; MASTER_CHIP_CATALOG; HARDWARE_REFERENCE.)","pair_bonding_note":"Treated by firmware as S9-family silicon (0x1387). Never wire a BM1393-marked board to an S17\/T17 control board expecting it to enumerate.","counterfeit_note":"Because \"BM1393\" is widely mis-documented as an S17 chip, mis-labelled boards circulate. Trust the chip-ID readback and the S9-family geometry, not the printed model name."},{"chip":"BM1397","manufacturer":"Bitmain","process_node":"7nm","generation":"Gen 2 (S17\/T17)","year":2019,"algorithm":"SHA-256","hashrate_per_chip":"~166-200 GH\/s","efficiency":"40-55 J\/TH (S17+ 40 \/ S17 45 \/ T17 55)","models":"Antminer S17, S17 Pro, T17, S17e, T17e (entire S17\/T17 base+e generation)","chips_per_board":"48 (S17)","voltage_domains":"12","chips_per_domain":"4 (S17)","domain_voltage":"~1.55 V (per domain, S17)","chip_id":"0x1397","confidence":"Documented","substitution_note":"The ENTIRE S17\/T17 base and \"e\" generation uses the 7nm BM1397 \u2014 672 cores, 0x51\/0x41 command-header family. It is the registered, production driver for 0x1397. (Verified: MASTER_CHIP_CATALOG L16, HARDWARE_REFERENCE, the BM1396\/1397 disambiguation PR-056, the chip genealogy bible.)","pair_bonding_note":"BM1397 and BM1396 (the S17+\/T17+ \"Plus\" chip) are register-compatible within the same 0x51\/0x41 header family but are DISTINCT chip IDs \u2014 firmware dispatches on the GetAddress word and a 0x1396 die is never silently mapped onto the 0x1397 driver. Do not cross-populate boards between the base\/e and the Plus generation.","counterfeit_note":"BM1397 is one of the most-studied mining ASICs and is open-documented (Mujina). Harvested S17-era dies are heavily recycled \u2014 the S17 generation was notorious for thermal failures, so \"tested working\" BM1397 boards on the used market warrant a full bench check."},{"chip":"BM1396","manufacturer":"Bitmain","process_node":"7nm","generation":"Gen 2 (S17+\/T17+ \"Plus\")","year":2020,"algorithm":"SHA-256","hashrate_per_chip":"~200 GH\/s","efficiency":"~36 J\/TH","models":"Antminer S17+, T17+","chips_per_board":"","voltage_domains":"12","chips_per_domain":"","domain_voltage":"~1.55 V (per domain)","chip_id":"0x1396","confidence":"Named-only","substitution_note":"The \"Plus\" sibling of BM1397, hosting the S17+\/T17+. It is register-compatible with BM1397 within the BM1397-era 0x51\/0x41 header family but carries its own 0x1396 chip ID. (Verified: BM1396\/1397 disambiguation PR-056; chip genealogy bible.)","pair_bonding_note":"Distinct identity from BM1397 \u2014 a 0x1396 die enumerates as its own chip and is never mapped onto the BM1397 driver. Keep S17+\/T17+ boards on their own family; do not mix with base-S17 (BM1397) boards.","counterfeit_note":"Frequently conflated with BM1397 in marketplace listings. Verify the chip-ID readback (0x1396 vs 0x1397) and the S17+\/T17+ host attribution before swapping a board between platforms."},{"chip":"BM1398","manufacturer":"Bitmain","process_node":"7nm","generation":"Gen 3 (S19 family)","year":2020,"algorithm":"SHA-256","hashrate_per_chip":"~90 GH\/s","efficiency":"29.5 J\/TH","models":"Antminer S19 (76-chip), S19 Pro (114-chip), S19j, S19a, T19","chips_per_board":"76 (S19) \/ 114 (S19 Pro)","voltage_domains":"38","chips_per_domain":"2 (S19) \/ 3 (S19 Pro)","domain_voltage":"~0.36 V (S19) \/ ~0.32 V (S19 Pro)","chip_id":"0x1398","confidence":"Bench-verified","substitution_note":"The S19 (76 chips, 2 chips\/domain) and the S19 Pro (114 chips, 3 chips\/domain) BOTH use BM1398 on a 38-domain board \u2014 the difference is chip population per domain, not a different chip. (Verified: HASHBOARD_DIAGNOSTICS \u00a71.3; MASTER_CHIP_CATALOG.)","pair_bonding_note":"A genuine BM1398 board is dispatch-compatible, but an S19 board and an S19 Pro board are NOT interchangeable wholesale \u2014 they differ in chip population, domain wiring, and boost topology. Match the board to the model.","counterfeit_note":"The S19 line is the most-traded used ASIC; harvested BM1398 dies and re-worked boards are everywhere. Confirm the 76- vs 114-chip layout and the dsPIC33EP voltage controller before paying for a \"Pro\"."},{"chip":"BM1362","manufacturer":"Bitmain","process_node":"5nm","generation":"Gen 4 (S19j Pro family)","year":2022,"algorithm":"SHA-256","hashrate_per_chip":"~110 GH\/s","efficiency":"~21.5 J\/TH","models":"Antminer S19j Pro, S19j Pro+","chips_per_board":"","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1362","confidence":"Bench-verified","substitution_note":"Bitmain's first 5nm SHA-256 die, used in the S19j Pro \/ S19j Pro+. A distinct 0x1362 chip ID with its own registered driver. (Verified: MASTER_CHIP_CATALOG \u2014 DRIVEN, S19j Pro 66 TH\/s sustained on the bench.)","pair_bonding_note":"Not interchangeable with the 7nm BM1398 S19 boards despite the shared \"S19\" badge \u2014 different node, different chip ID, different board. Match the board to the exact S19j Pro revision.","counterfeit_note":"The \"S19j Pro\" badge spans both 7nm and 5nm silicon depending on revision; verify the chip-ID readback rather than the model sticker."},{"chip":"BM1366","manufacturer":"Bitmain","process_node":"5nm","generation":"Gen 4 (S19 XP \/ first 5nm flagship)","year":2022,"algorithm":"SHA-256","hashrate_per_chip":"~100 GH\/s","efficiency":"21.5 J\/TH","models":"Antminer S19 XP, S19K Pro, S19XP Hydro  \u00b7  Bitaxe Ultra \/ Hex Supra (single-chip)","chips_per_board":"varies","voltage_domains":"varies","chips_per_domain":"","domain_voltage":"","chip_id":"0x1366","confidence":"Documented","substitution_note":"Bitmain's first 5nm flagship die (S19 XP). The single-chip variant is the heart of the Bitaxe Ultra and one chip per cell in the Bitaxe Hex Supra \u2014 proving a full-Antminer ASIC can drive a sovereign solo miner. (Verified: bible-facts; MASTER_CHIP_CATALOG \u2014 first share on a Bitaxe-class board 2026-03-19.)","pair_bonding_note":"In a Bitaxe Ultra it runs as a single chip on its own board; in an Antminer XP board it is daisy-chained. Do not transplant an XP-harvested die into a Bitaxe board \u2014 package and board design differ.","counterfeit_note":"On the Bitaxe side, clone boards using questionable BM1366 sourcing exist. On the Antminer side, the XP is a premium target for re-marked dies. In both cases, verify the chip ID and source provenance."},{"chip":"BM1368","manufacturer":"Bitmain","process_node":"5nm","generation":"Gen 5 (S21 \/ T21)","year":2023,"algorithm":"SHA-256","hashrate_per_chip":"600-750 GH\/s","efficiency":"17.5 J\/TH","models":"Antminer S21, T21, S21 Hydro  \u00b7  Bitaxe Supra (single-chip)","chips_per_board":"108 (S21)","voltage_domains":"12","chips_per_domain":"9 (S21)","domain_voltage":"~1.2 V (per domain)","chip_id":"0x1368","confidence":"Bench-verified","substitution_note":"A major architectural shift: ~6-7x per-chip hashrate, ~1.2 V domains (up from ~0.4 V), and NO PIC controller (removed this generation). The single-chip variant powers the Bitaxe Supra. (Verified: HASHBOARD_DIAGNOSTICS \u00a71.3 \u2014 108 chips \/ 12 domains \/ no PIC; KNOWN-BASELINE \u2014 Supra=BM1368.)","pair_bonding_note":"S21 (BM1368) and S21 XP \/ Pro (BM1370) are different 5nm chips on different boards \u2014 same family badge, distinct chip IDs (0x1368 vs 0x1370). Never cross-populate. S21 boards have no PIC, so never GPIO-reset them like an S9\/S19 \u2014 probe the voltage controller instead.","counterfeit_note":"The S21 is the current high-value target. Because it carries no PIC, a \"missing PIC\" is normal, not a defect \u2014 counterfeit listings sometimes claim the opposite. Verify the 108-chip \/ 12-domain layout and the CV1835 control board."},{"chip":"BM1370","manufacturer":"Bitmain","process_node":"5nm","generation":"Gen 5 (S21 Pro \/ XP \u2014 flagship 5nm)","year":2024,"algorithm":"SHA-256","hashrate_per_chip":"~750+ GH\/s","efficiency":"15 J\/TH","models":"Antminer S21 Pro, S21 XP, S21+  \u00b7  Bitaxe Gamma \/ Gamma Turbo (single-chip)","chips_per_board":"91 (S21 XP)","voltage_domains":"13 (S21 XP)","chips_per_domain":"7 (S21 XP)","domain_voltage":"~1.04 V (per domain, S21 XP)","chip_id":"0x1370","confidence":"Documented","substitution_note":"Bitmain's most efficient SHA-256 die to date (15 J\/TH). The single-chip variant is the BM1370 in the Bitaxe Gamma and Gamma Turbo \u2014 the highest-efficiency open-source solo board you can buy. (Verified across 15+ Bible docs: Gamma=BM1370, the protected mapping; HASHBOARD_DIAGNOSTICS \u00a71.3 \u2014 S21 XP 91 chips \/ 13 domains.)","pair_bonding_note":"Distinct from BM1368 (S21 base) \u2014 0x1370 vs 0x1368, different board geometry. Same NoPIC, audio-DAC-controlled voltage architecture as the S21; probe the controller, never GPIO-reset.","counterfeit_note":"On Bitaxe boards, the Gamma chip is the most-counterfeited single die \u2014 re-marked or salvaged silicon shows up on the cheapest \"Gamma\" clones. Verify the chip-ID readback (0x1370) and buy from a documented source; the genuine Gamma is BM1370, never BM1371 or any other invented part number."},{"chip":"BM1373","manufacturer":"Bitmain","process_node":"5nm \/ 3nm (projected)","generation":"Gen 6 (S23 \u2014 pre-hardware)","year":2025,"algorithm":"SHA-256","hashrate_per_chip":"projected","efficiency":"projected (sub-15 J\/TH target)","models":"Antminer S23 (pre-coverage \u2014 not yet shipping)","chips_per_board":"","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1373","confidence":"Projected (pre-hardware)","substitution_note":"RUMORED \/ PRE-COVERAGE: BM1373 is the projected S23-generation die. Every value here is a placeholder pending hardware \u2014 D-Central publishes it with confirmed-vs-rumored discipline. A 0x1373 scaffold exists; no live silicon. (Verified-as-projected: MASTER_CHIP_CATALOG \u2014 NAMED ONLY, internal intel 2026-04-14.)","pair_bonding_note":"No production hardware to substitute or pair-bond yet. This row will be updated to confirmed values once a unit reaches the bench.","counterfeit_note":"No genuine BM1373 hardware is on the open market. Treat any \"S23 in stock\" listing as unverified until Bitmain ships."},{"chip":"BM1485","manufacturer":"Bitmain","process_node":"28nm","generation":"Scrypt (Litecoin\/Dogecoin)","year":2017,"algorithm":"Scrypt","hashrate_per_chip":"~258 MH\/s","efficiency":"~1.6 J\/MH","models":"Antminer L3+, L3++","chips_per_board":"72","voltage_domains":"12","chips_per_domain":"6","domain_voltage":"~0.80 V (per domain)","chip_id":"","confidence":"Named-only","substitution_note":"A Scrypt (not SHA-256) ASIC \u2014 not interchangeable with any Bitcoin miner chip. Listed for completeness. (Verified: MASTER_CHIP_CATALOG \u00a72; HASHBOARD_DIAGNOSTICS \u00a72.2 \u2014 72 chips \/ 12 domains.)","pair_bonding_note":"Scrypt-only; never cross-populate with a SHA-256 board.","counterfeit_note":"Aging L3+ stock is frequently re-sold; verify the 72-chip Scrypt layout."},{"chip":"BM1489","manufacturer":"Bitmain","process_node":"7nm","generation":"Scrypt (Litecoin\/Dogecoin)","year":2021,"algorithm":"Scrypt","hashrate_per_chip":"~19.8 MH\/s","efficiency":"~0.36 J\/MH","models":"Antminer L7","chips_per_board":"120 (per chain, 4 chains)","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"","confidence":"Documented","substitution_note":"The 7nm Scrypt die behind the L7 (nameplate 9.5 GH\/s @ 3,425 W). Scrypt-only \u2014 no SHA-256 substitution path. (Verified: MASTER_CHIP_CATALOG \u00a72 \u2014 silicon profile, 120 chips\/chain \u00d7 4 chains.)","pair_bonding_note":"Scrypt-only; not interchangeable with Bitcoin silicon.","counterfeit_note":"High-value Scrypt part; verify the 4-chain \/ 120-chip-per-chain layout."},{"chip":"MicroBT K1 (chip_id 0x1000)","manufacturer":"MicroBT","process_node":"28nm (legacy)","generation":"WhatsMiner Gen 1","year":2018,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"WhatsMiner M1, M2, M3, M5, M6, M7 (M3 v10-v50)","chips_per_board":"per model","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1000","confidence":"Named-only","substitution_note":"MicroBT identifies its silicon by a cgminer chip_id rather than a public part number. K1 (0x1000) is the legacy 28nm generation. Cores-per-chip is a documented GAP \u2014 MicroBT stores chips-per-board (chip_num), not cores-per-chip. (Verified: MASTER_CHIP_CATALOG \u00a73 \u2014 NAMED ONLY, cgminer.default chip_id.)","pair_bonding_note":"WhatsMiner boards are tied to their model's firmware and chip_id; do not cross-populate across K-generations.","counterfeit_note":"MicroBT does not publish chip part numbers, so \"chip type\" claims on used WhatsMiner boards are unverifiable by marking alone \u2014 confirm the model and firmware chip_id."},{"chip":"MicroBT K2 (chip_id 0x1800)","manufacturer":"MicroBT","process_node":"16nm","generation":"WhatsMiner Gen 2","year":2019,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"WhatsMiner M8, M10, M11, M12 (M8-M12 line)","chips_per_board":"per model","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1800","confidence":"Named-only","substitution_note":"The 16nm K-Gen-2 family. chip_id 0x1800 is read from the stock cgminer config; the part number is not published by MicroBT. (Verified: MASTER_CHIP_CATALOG \u00a73 \u2014 cgminer.default.m10s chip_id 0x1800.)","pair_bonding_note":"Match the board to its M-series model and firmware; chip_id must agree with the configured model.","counterfeit_note":"Verify by model + firmware chip_id, not by any silk-screen part number."},{"chip":"MicroBT K3 (chip_id 0x1920)","manufacturer":"MicroBT","process_node":"7nm","generation":"WhatsMiner Gen 3","year":2020,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"WhatsMiner M19, M20, M20S (and the M50\/M60 5nm\/3nm extension)","chips_per_board":"per model (M20S ~105)","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"0x1920","confidence":"Named-only","substitution_note":"The 7nm K-Gen-3 family (with a newer 5nm\/3nm M50\/M60 extension). chip_id 0x1920 from the M20S stock config; M20S stores chip_num = 105 (chips per board), not cores per chip. (Verified: MASTER_CHIP_CATALOG \u00a73 \u2014 cgminer.default.m20s chip_id 0x1920; M60S model_code 0x3C45B000.)","pair_bonding_note":"Do not mix M19\/M20-class boards with M50\/M60-class boards; the chip generation and firmware differ.","counterfeit_note":"High-value modern WhatsMiner boards are cloned; verify model + firmware chip_id and board chip_num."},{"chip":"Avalon A3200C-Plus","manufacturer":"Canaan (Avalon)","process_node":"7nm (older)","generation":"Avalon (A13-series host)","year":2021,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"Avalon A1346, A1346N (MM317 control)","chips_per_board":"per model","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"","confidence":"Named-only","substitution_note":"Canaan Avalon chips are identified per model; the freq\/voltage tables are ENCRYPTED on-device (AES-CBC, single industrial master key, OTP on a K210 eFuse) \u2014 so per-chip tuning data is not publicly recoverable. (Verified: MASTER_CHIP_CATALOG \u00a74 \u2014 NAMED ONLY; AVALON encrypted-payload finding.)","pair_bonding_note":"Avalon boards are matched to their MM-series control module (MM317\/318\/319); do not cross-populate across MM generations.","counterfeit_note":"Canaan does not publish chip part numbers; verify by model + MM firmware version."},{"chip":"Avalon A3198S","manufacturer":"Canaan (Avalon)","process_node":"7nm (refined)","generation":"Avalon (A14-series host)","year":2023,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"Avalon A14x, A14xI, A1466HS (MM318_X2 control; air + liquid)","chips_per_board":"per model","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"","confidence":"Named-only","substitution_note":"The A14-series Avalon die family (MM318_X2 firmware). Freq\/voltage tables encrypted on-device. (Verified: MASTER_CHIP_CATALOG \u00a74 \u2014 NAMED ONLY.)","pair_bonding_note":"Match to the MM318 control module and cooling type (air vs liquid).","counterfeit_note":"Verify by model + MM318 firmware, not by chip marking."},{"chip":"Avalon A3197S","manufacturer":"Canaan (Avalon)","process_node":"5nm-class","generation":"Avalon (A15-series host)","year":2024,"algorithm":"SHA-256","hashrate_per_chip":"board-rated","efficiency":"see model spec","models":"Avalon A15x, A15xI, A1566HS (MM319 control; air + liquid)","chips_per_board":"per model","voltage_domains":"","chips_per_domain":"","domain_voltage":"","chip_id":"","confidence":"Named-only","substitution_note":"The current 5nm-class A15-series Avalon die family (MM319 firmware). Freq\/voltage tables encrypted on-device. (Verified: MASTER_CHIP_CATALOG \u00a74 \u2014 NAMED ONLY.)","pair_bonding_note":"Match to the MM319 control module and cooling type.","counterfeit_note":"Verify by model + MM319 firmware version."}]