{
    "meta": {
        "title": "D-Central — Model ↔ Hashboard Architecture Matrix",
        "description": "Model-keyed hash-board architecture for 9 Bitcoin ASIC miner models: ASIC chip, chips per board, boards per unit, total chips, voltage DOMAINS per board, chips per domain, per-DOMAIN rail voltage (not per-chip), boost output, PIC presence/refdes, EEPROM refdes, temp-sensor count, crystal, stock PSU, level shifters and the common chain-break signature.",
        "generated": "2026-06-23T19:37:57+00:00",
        "version": "1.0",
        "license": "https://creativecommons.org/licenses/by/4.0/",
        "license_name": "CC BY 4.0",
        "source": "https://d-central.tech/asic-hashboard-reference/",
        "record_count": 9,
        "provenance": "D-Central Mining Bible: HASHBOARD_DIAGNOSTICS (§1–§3, §12), ANTMINER_ARCHITECTURE, PSU_PROTOCOL_BIBLE. Voltage is per-DOMAIN, not per-chip (per-chip = domain rail ÷ chips-per-domain). Any cell not grounded in the Bible is marked \"unverified\", never blank.",
        "disclaimer": "A reference, not a guarantee. Component reference designators (PIC/EEPROM/temp/level-shifter refdes) vary by board revision — always verify against the specific board before ordering parts or probing. High-current DC rails are dangerous; discharge and measure before servicing."
    },
    "rows": [
        {
            "slug": "antminer-s9",
            "model": "Antminer S9",
            "series": "S9 (BM1387 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1387",
            "chips_per_board": 63,
            "boards_per_unit": 3,
            "total_chips_per_unit": 189,
            "voltage_domains_per_board": 21,
            "chips_per_domain": 3,
            "domain_voltage_v": "0.40",
            "boost_output_v": "unverified (no discrete boost stage documented; the 21 domains stack in series to ~8.4V from the ~12V PSU rail)",
            "pic_present": "yes",
            "pic_refdes": "unverified (per-board PIC addressed on I2C at 0x50 + (chain−1); S9 uses chains 6/7/8)",
            "eeprom_refdes": "unverified (no EEPROM populated on the live-probed S9 at 0x50–0x54)",
            "temp_sensor_count": "unverified",
            "crystal": "25 MHz",
            "stock_psu": "APW3++ / APW7",
            "level_shifters": "yes (3.3V↔chip-level UART; count unverified)",
            "common_chain_break_signature": "Fixture reports fewer than 63 chips on a chain; the break is the chip immediately after the last detected chip (a dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO, so every chip downstream goes invisible).",
            "confidence": "high on chip/domain/PSU; medium overall (board-level refdes not enumerated for S9 in the Bible)",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5; ANTMINER_ARCHITECTURE.md (S9 I2C / control board)"
        },
        {
            "slug": "antminer-s17",
            "model": "Antminer S17 / T17",
            "series": "S17 (BM1393 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1393",
            "chips_per_board": 48,
            "boards_per_unit": 3,
            "total_chips_per_unit": 144,
            "voltage_domains_per_board": 12,
            "chips_per_domain": 4,
            "domain_voltage_v": "1.55",
            "boost_output_v": "unverified (APW9 supplies 14.5–21V directly; the ~18.5V domain stack may run without a discrete boost)",
            "pic_present": "yes",
            "pic_refdes": "unverified (PIC was removed only at the BM1368/S21 generation, so the BM1393 board still carries one; refdes not enumerated in the Bible)",
            "eeprom_refdes": "unverified",
            "temp_sensor_count": "unverified",
            "crystal": "25 MHz",
            "stock_psu": "APW9",
            "level_shifters": "yes (count unverified)",
            "common_chain_break_signature": "Fixture reports fewer than 48 chips on a chain; the break is the chip immediately after the last detected chip (open/short chip stops forwarding the daisy-chain signals; all downstream chips go invisible).",
            "confidence": "medium. The figures are the Bible's S17 BM1393 reference; the T17 shares the BM1393 platform but its model-specific chip count is not separately enumerated in the Bible.",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5; PSU_PROTOCOL_BIBLE.md §1 (APW9 → S17/S17 Pro/T17)"
        },
        {
            "slug": "antminer-s19",
            "model": "Antminer S19",
            "series": "S19 (BM1398 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1398",
            "chips_per_board": 76,
            "boards_per_unit": 3,
            "total_chips_per_unit": 228,
            "voltage_domains_per_board": 38,
            "chips_per_domain": 2,
            "domain_voltage_v": "0.36",
            "boost_output_v": "19 (14V boost input → 19V; LDO chain 19V → 1.8V → 0.8V per domain)",
            "pic_present": "yes",
            "pic_refdes": "U3 (PIC16F1704)",
            "eeprom_refdes": "U5",
            "temp_sensor_count": "4 (U4, U6, U7, U8)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW12",
            "level_shifters": "U1, U2 (2)",
            "common_chain_break_signature": "Fixture reports fewer than 76 chips on a chain; the break is the chip immediately after the last detected chip (e.g. 29 of 76 detected → fault at chip 30). A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.",
            "confidence": "high",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.1"
        },
        {
            "slug": "antminer-s19-pro",
            "model": "Antminer S19 Pro",
            "series": "S19 (BM1398 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1398",
            "chips_per_board": 114,
            "boards_per_unit": 3,
            "total_chips_per_unit": 342,
            "voltage_domains_per_board": 38,
            "chips_per_domain": 3,
            "domain_voltage_v": "0.32",
            "boost_output_v": "20 (12.6V → 20V via Q9; domains 38–32 LDO off the 19V boost, domains 31–1 LDO off VDD12.6V → 1.8V)",
            "pic_present": "yes",
            "pic_refdes": "U6 (PIC16F1704)",
            "eeprom_refdes": "U10",
            "temp_sensor_count": "4 (U5, U7, U8, U9)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW12",
            "level_shifters": "U1, U2 (2)",
            "common_chain_break_signature": "Fixture reports fewer than 114 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.",
            "confidence": "high",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.1"
        },
        {
            "slug": "antminer-s19j-pro",
            "model": "Antminer S19j Pro",
            "series": "S19 (BM1398 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1398",
            "chips_per_board": 126,
            "boards_per_unit": 3,
            "total_chips_per_unit": 378,
            "voltage_domains_per_board": 42,
            "chips_per_domain": 3,
            "domain_voltage_v": "0.30",
            "boost_output_v": "19",
            "pic_present": "yes",
            "pic_refdes": "unverified (present per §12.1; refdes not enumerated)",
            "eeprom_refdes": "unverified (present per §12.1; refdes not enumerated)",
            "temp_sensor_count": "4 (refdes not enumerated)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW12",
            "level_shifters": "U1, U2 (2)",
            "common_chain_break_signature": "Fixture reports fewer than 126 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.",
            "confidence": "high on counts; medium on refdes",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5, §12.1"
        },
        {
            "slug": "antminer-s19-xp",
            "model": "Antminer S19 XP",
            "series": "S19 XP (BM1366 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1366",
            "chips_per_board": 110,
            "boards_per_unit": 3,
            "total_chips_per_unit": 330,
            "voltage_domains_per_board": 11,
            "chips_per_domain": 10,
            "domain_voltage_v": "~0.4",
            "boost_output_v": "19",
            "pic_present": "yes",
            "pic_refdes": "unverified (PIC microcontroller present as I2C slave managing the regulators; refdes not enumerated)",
            "eeprom_refdes": "unverified (EEPROM present, stores board identity; refdes not enumerated)",
            "temp_sensor_count": "unverified (TMP75 I2C temp sensor present; exact count not enumerated, §12.1 notes 2+ sensors)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW12 / APW171215",
            "level_shifters": "yes (3.3V↔1.8V for UART; count unverified)",
            "common_chain_break_signature": "Fixture reports fewer than 110 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.",
            "confidence": "medium. Domain count 11 × 10 chips/domain is from ANTMINER_ARCHITECTURE (S19 XP hash board); HASHBOARD_DIAGNOSTICS §12.1 lists the S19 XP domain split as 'Varies'.",
            "bible_source": "ANTMINER_ARCHITECTURE.md (S19 XP Hash Board); HASHBOARD_DIAGNOSTICS.md §1.2, §3.5, §12.1"
        },
        {
            "slug": "antminer-s21",
            "model": "Antminer S21 / T21",
            "series": "S21 (BM1368 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1368",
            "chips_per_board": 108,
            "boards_per_unit": 3,
            "total_chips_per_unit": 324,
            "voltage_domains_per_board": 12,
            "chips_per_domain": 9,
            "domain_voltage_v": "~1.2",
            "boost_output_v": "~25 (VDD_IN → ~25V via U206; domains 1–10 use 3 LDOs each to 1.2V/0.8V, domains 11–12 use MP2019 bucks U166/U200 → 2V → LDOs)",
            "pic_present": "no",
            "pic_refdes": "n/a (PIC removed at the BM1368 generation)",
            "eeprom_refdes": "U6",
            "temp_sensor_count": "2 (U5 inlet, U7 outlet)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW171215a",
            "level_shifters": "11 units",
            "common_chain_break_signature": "Fixture reports fewer than 108 chips on a chain (e.g. 29 of 108 detected → fault at chip 30). A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.",
            "confidence": "high. Figures are the Bible's S21/T21 BM1368 reference; the T21 shares the BM1368 hash-board platform.",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.2; ANTMINER_ARCHITECTURE.md (S21 hash board)"
        },
        {
            "slug": "antminer-s21-pro",
            "model": "Antminer S21 Pro",
            "series": "S21 (BM1370 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1370",
            "chips_per_board": "unverified (§12.2 lists 'Varies')",
            "boards_per_unit": 3,
            "total_chips_per_unit": "unverified",
            "voltage_domains_per_board": "unverified (§12.2 lists 'Varies')",
            "chips_per_domain": "unverified (§12.2 lists 'Varies')",
            "domain_voltage_v": "~1.0",
            "boost_output_v": "~21",
            "pic_present": "no",
            "pic_refdes": "n/a (PIC removed at the BM1368/BM1370 generation)",
            "eeprom_refdes": "unverified (EEPROM present; refdes not enumerated)",
            "temp_sensor_count": "unverified (multiple sensors; count not enumerated)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW171215a",
            "level_shifters": "12+ units",
            "common_chain_break_signature": "Fixture reports fewer chips than the chain expects; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.",
            "confidence": "medium-low. The Bible records the S21 Pro chip/domain counts as 'Varies'; per-domain rail ~1.0V, boost ~21V and the BM1370 chip are grounded.",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.2, §3.5, §12.2"
        },
        {
            "slug": "antminer-s21-xp",
            "model": "Antminer S21 XP",
            "series": "S21 XP (BM1370 generation)",
            "manufacturer": "Bitmain",
            "asic_chip": "BM1370",
            "chips_per_board": 91,
            "boards_per_unit": 3,
            "total_chips_per_unit": 273,
            "voltage_domains_per_board": 13,
            "chips_per_domain": 7,
            "domain_voltage_v": "~1.04",
            "boost_output_v": "~21 (domains 1–11 use 1.2V/0.8V LDOs ×3 per domain, domains 12–13 use MP2019 bucks U146/U202 → 2.5V → LDOs)",
            "pic_present": "no",
            "pic_refdes": "n/a (PIC removed at the BM1368/BM1370 generation)",
            "eeprom_refdes": "unverified (EEPROM present; refdes not enumerated)",
            "temp_sensor_count": "unverified (U19 4-way I2C switch; U20, U22 isolation ICs — discrete temp-sensor count not enumerated)",
            "crystal": "25 MHz (Y1)",
            "stock_psu": "APW171215a",
            "level_shifters": "12 (U1–U12)",
            "common_chain_break_signature": "Fixture reports fewer than 91 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.",
            "confidence": "high",
            "bible_source": "HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.2; ANTMINER_ARCHITECTURE.md (S21 XP hash board)"
        }
    ]
}