{
    "meta": {
        "title": "D-Central — ASIC Power & Connector Pinout Reference",
        "description": "Pin reference for 7 standard Bitcoin ASIC miner connectors: PSU output terminals, the APW12/APW9 4-pin I2C signal terminal, the 18-pin hash-board signal cable, the chassis fan header and the control-board UART debug header — each with pin, signal, voltage and notes.",
        "generated": "2026-06-22T19:18:01+00:00",
        "version": "1.0",
        "license": "https://creativecommons.org/licenses/by/4.0/",
        "license_name": "CC BY 4.0",
        "source": "https://d-central.tech/asic-power-connector-pinout-reference/",
        "record_count": 7,
        "provenance": "D-Central Mining Bible: PSU_PROTOCOL_BIBLE, HASHBOARD_DIAGNOSTICS, ANTMINER_ARCHITECTURE. Standard connector/pin reference only — each row cites its Bible source. last_verified per row.",
        "disclaimer": "A reference, not a wiring guarantee. Pin numbering and keying vary by board revision — always verify pin 1 against the specific board before connecting. Mains-voltage PSUs and high-current DC rails are dangerous: discharge and verify with a meter before servicing."
    },
    "rows": [
        {
            "id": "apw12-j15-signal",
            "connector": "APW12 J15 — 4-pin signal / voltage-control terminal",
            "type": "signal/control",
            "applicability": "APW12 (S19, S19 Pro, S19j, S19j Pro, T19). APW9/APW9+ expose the same PIC16F1704 I2C interface; APW17 is assumed identical (model string 'APW17_') but not independently verified in the Bible.",
            "pins": [
                {
                    "pin": "1",
                    "signal": "SDA",
                    "voltage": "3.3V",
                    "notes": "I2C data line (open-drain, external pull-ups)"
                },
                {
                    "pin": "2",
                    "signal": "SCL",
                    "voltage": "3.3V",
                    "notes": "I2C clock line (open-drain)"
                },
                {
                    "pin": "3",
                    "signal": "EN",
                    "voltage": "3.3V logic",
                    "notes": "Enable — ACTIVE LOW; pull to GND to enable PSU output"
                },
                {
                    "pin": "4",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Ground reference"
                }
            ],
            "notes": "I2C bus runs at ~400 Hz (not kHz) on slave address 0x10. With EN shorted to GND and no I2C master attached, the output defaults to ~15.2V — firmware must set the correct target voltage before loading the hash boards. Never hot-plug this signal cable; the 3.3V logic can be damaged.",
            "source": "PSU_PROTOCOL_BIBLE.md §2 (APW12 Physical Interface)",
            "last_verified": "2026-06"
        },
        {
            "id": "apw12-j3-j4-out1",
            "connector": "APW12 J3/J4 — OUT1 high-current DC output",
            "type": "power",
            "applicability": "APW12 (S19 family). APW9/APW9+/APW17 provide an equivalent high-current hash-board output. Voltage is model-dependent: 12–15V on the S19-family APW12-1215; up to 14–17V on the APW12-1417 variant (L7/KA3).",
            "pins": [
                {
                    "pin": "J3/J4 (+)",
                    "signal": "OUT1 +12–15V DC",
                    "voltage": "12–15V (tunable)",
                    "notes": "Hash-board power. Up to 233A via multiple parallel pins / copper bus bars. Voltage is set through the J15 I2C control (8-bit DAC)."
                },
                {
                    "pin": "J3/J4 (−)",
                    "signal": "GND / return",
                    "voltage": "0V",
                    "notes": "High-current return"
                }
            ],
            "notes": "Main hash-board power rail. Connection order (physical): connect negative (GND) first, then positive (+12V), and insert the signal cable LAST. Reverse on removal. Never connect/disconnect the signal cable while power is applied.",
            "source": "PSU_PROTOCOL_BIBLE.md §2, §13",
            "last_verified": "2026-06"
        },
        {
            "id": "apw12-j6-out2",
            "connector": "APW12 J6 — OUT2 control-board / auxiliary 12V output",
            "type": "power",
            "applicability": "APW12 family (control board + chassis fans).",
            "pins": [
                {
                    "pin": "J6 (+)",
                    "signal": "OUT2 +12V",
                    "voltage": "12V fixed",
                    "notes": "15A max; powers the control board and chassis fans"
                },
                {
                    "pin": "J6 (−)",
                    "signal": "GND / return",
                    "voltage": "0V",
                    "notes": "Return"
                }
            ],
            "notes": "Fixed 12V auxiliary rail, independent of the tunable OUT1. Comes up first at power-on (~1–2s) to boot the control board before the hash boards are energised.",
            "source": "PSU_PROTOCOL_BIBLE.md §1 (Internal Architecture), §2",
            "last_verified": "2026-06"
        },
        {
            "id": "apw12-j31-fan",
            "connector": "APW12 J31 — internal PSU fan power",
            "type": "fan (PSU internal)",
            "applicability": "APW12 PSU internal cooling fan.",
            "pins": [
                {
                    "pin": "J31 (+)",
                    "signal": "+12V (auxiliary rail)",
                    "voltage": "12V",
                    "notes": "PSU internal cooling fan power"
                },
                {
                    "pin": "J31 (−)",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Return"
                }
            ],
            "notes": "Fed from the internal auxiliary 12V rail. The PSU fan is governed by the PSU's own internal PIC/PWM thermal circuitry — it is NOT exposed on the I2C interface and cannot be overridden by the control board.",
            "source": "PSU_PROTOCOL_BIBLE.md §11 (Fan Control)",
            "last_verified": "2026-06"
        },
        {
            "id": "hashboard-18pin-signal",
            "connector": "Hash-board IO connector — 18-pin signal cable (control board ↔ hash board)",
            "type": "signal/data",
            "applicability": "S19 / S21 generation (pin assignments confirmed across S19/S21 documentation). Numbering varies slightly by model generation — always verify against the specific board schematic.",
            "pins": [
                {
                    "pin": "1",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Ground reference"
                },
                {
                    "pin": "2",
                    "signal": "VCC_3V3",
                    "voltage": "3.3V",
                    "notes": "Logic power from control board (CB→HB)"
                },
                {
                    "pin": "3",
                    "signal": "RST",
                    "voltage": "0–3.3V",
                    "notes": "Reset to the chip chain (CB→HB)"
                },
                {
                    "pin": "4",
                    "signal": "SDA (I2C)",
                    "voltage": "3.3V",
                    "notes": "Temp-sensor / EEPROM data (bidirectional)"
                },
                {
                    "pin": "5",
                    "signal": "SCL (I2C)",
                    "voltage": "3.3V",
                    "notes": "Temp-sensor / EEPROM clock (CB→HB)"
                },
                {
                    "pin": "6",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Ground"
                },
                {
                    "pin": "7",
                    "signal": "TX / CI",
                    "voltage": "3.3V",
                    "notes": "UART transmit — command input (CB→HB)"
                },
                {
                    "pin": "8",
                    "signal": "RX / RO",
                    "voltage": "3.3V",
                    "notes": "UART receive — response output (HB→CB)"
                },
                {
                    "pin": "9–18",
                    "signal": "Various",
                    "voltage": "—",
                    "notes": "Additional GND, VCC and status signals — verify against board schematic"
                }
            ],
            "notes": "Carries power (3.3V), ground and the digital chain signals (CLK, CI/RO, RST, temp-sensor I2C). On the hash board, the 3.3V UART is level-shifted down to the chips' signal levels (~1.1V on S21, up to ~1.8V on S19). Insert this cable LAST and remove it FIRST — the 3.3V signals are damaged by hot-plugging.",
            "source": "HASHBOARD_DIAGNOSTICS.md §1.4 (IO Connector Pinout) + ANTMINER_ARCHITECTURE.md",
            "last_verified": "2026-06"
        },
        {
            "id": "chassis-fan-4pin",
            "connector": "Chassis cooling fan header — 4-pin",
            "type": "fan (chassis)",
            "applicability": "Antminer control-board fan headers (S9/S17/S19/S21 generations). Repair fixtures accept KF2510 4/6-pin and 5557 4-pin fan connectors.",
            "pins": [
                {
                    "pin": "1",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Ground"
                },
                {
                    "pin": "2",
                    "signal": "+12V",
                    "voltage": "12V",
                    "notes": "Fan power (from the OUT2 auxiliary rail)"
                },
                {
                    "pin": "3",
                    "signal": "TACH (sense)",
                    "voltage": "open-collector pulse",
                    "notes": "Tachometer — fan-speed feedback to the control board"
                },
                {
                    "pin": "4",
                    "signal": "PWM (control)",
                    "voltage": "logic duty-cycle",
                    "notes": "Speed-control input from the control board"
                }
            ],
            "notes": "Standard 4-wire DC fan signals: GND, +12V, tachometer (RPM sense) and PWM speed control. Chassis fans are driven by the CONTROL BOARD, not the PSU (Zynq: FPGA PWM timer — register 0x0084 sets duty, 0x0004 reads RPM; Amlogic: SoC PWM channels 0,1), targeting hash-board TMP75 temperatures. The Bible enumerates these four signals but not their connector position — the pin numbering here follows the standard 4-wire DC-fan convention; confirm pin 1 keying on your specific board before wiring.",
            "source": "HASHBOARD_DIAGNOSTICS.md §11.4–§11.5 + PSU_PROTOCOL_BIBLE.md §11 (Miner Chassis Fans)",
            "last_verified": "2026-06"
        },
        {
            "id": "controlboard-uart-debug",
            "connector": "Control-board UART debug header",
            "type": "signal (debug)",
            "applicability": "Antminer control boards (Zynq and Amlogic generations). Used with a USB-to-TTL adapter (CP2102 / CH340) for serial diagnostics.",
            "pins": [
                {
                    "pin": "—",
                    "signal": "TX",
                    "voltage": "3.3V logic",
                    "notes": "Control-board serial transmit → adapter RX"
                },
                {
                    "pin": "—",
                    "signal": "RX",
                    "voltage": "3.3V logic",
                    "notes": "Control-board serial receive ← adapter TX"
                },
                {
                    "pin": "—",
                    "signal": "GND",
                    "voltage": "0V",
                    "notes": "Common ground (connect first)"
                },
                {
                    "pin": "—",
                    "signal": "VCC",
                    "voltage": "3.3V",
                    "notes": "Logic reference — usually leave unconnected when the board is self-powered"
                }
            ],
            "notes": "Serial console at 115200 8N1. The Bible documents the signal set and baud but not a fixed physical pin order — header position is board-specific, so identify TX/RX/GND with a multimeter or scope before connecting (3.3V logic; do not feed 5V TTL).",
            "source": "ANTMINER_ARCHITECTURE.md + HASHBOARD_DIAGNOSTICS.md §11.6 (DIY Fixture / serial console 115200 8N1)",
            "last_verified": "2026-06"
        }
    ]
}