D-CENTRALBitcoin Mining Quick-Reference

Bitcoin ASIC Chip Spec Quick-Reference Card

The chip-to-model-to-board-to-voltage-domain graph for Bitmain BM-series silicon and the single-chip boards the Bitaxe family uses. The voltage column is the nominal per-chip CORE voltage, held to one consistent basis across every row.

ChipGenerationNodeHost modelsChips/boardDomainsNominal core VChip-IDEfficiency
BM1385Gen 0 (S5/S7 era)28nmAntminer S5, S745 or 54 (S7 variants)unverified~200 J/TH
BM1387Gen 1 (S9 family)16nmAntminer S9, S9i, S9j, T9+6321~0.40 V0x138798 J/TH
BM1391S9-family refinement7nmAntminer S15, T15 (S9 SE in some sources)72120x1387 (shared)57 J/TH
BM1393S9j variant (named-only)7nmAntminer S9j (S9-family refinement)63 (S9-family)21 (S9-family)0x1387 (shared)~68 J/TH
BM1397Gen 2 (S17/T17)7nmAntminer S17, S17 Pro, T17, S17e, T17e (entire S17/T17 base+e generation)48 (S17)12~0.40 V0x139740-55 J/TH (S17+ 40 / S17 45 / T17 55)
BM1396Gen 2 (S17+/T17+ "Plus")7nmAntminer S17+, T17+65 (S17+)12~0.40 V0x1396~36 J/TH
BM1398Gen 3 (S19 family)7nmAntminer S19 (76-chip), S19 Pro (114-chip), S19j, S19a, T1976 (S19) / 114 (S19 Pro)38~0.36 V (S19) / ~0.32 V (S19 Pro)0x139829.5 J/TH
BM1362Gen 4 (S19j Pro family)5nmAntminer S19j Pro, S19j Pro+110 (S19j Pro)unverified0x1362~21.5 J/TH
BM1366Gen 4 (S19 XP / first 5nm flagship)5nmAntminer S19 XP, S19K Pro, S19XP Hydro · Bitaxe Ultra / Hex Supra (single-chip)variesvaries~0.40 V0x136621.5 J/TH
BM1368Gen 5 (S21 / T21)5nmAntminer S21, T21, S21 Hydro · Bitaxe Supra (single-chip)108 (S21)12~1.20 V0x136817.5 J/TH
BM1370Gen 5 (S21 Pro / XP — flagship 5nm)5nmAntminer S21 Pro, S21 XP, S21+ · Bitaxe Gamma / Gamma Turbo (single-chip)91 (S21 XP)13 (S21 XP)~0.40 V0x137015 J/TH
BM1373Gen 6 (S23 — pre-hardware)5nm / 3nm (projected)Antminer S23 (pre-coverage — not yet shipping)projectedprojected0x1373projected (sub-15 J/TH target)
BM1485Scrypt (Litecoin/Dogecoin)28nmAntminer L3+, L3++7212~1.6 J/MH
BM1489Scrypt (Litecoin/Dogecoin)7nmAntminer L7120 (per chain, 4 chains)unverified~0.36 J/MH
MicroBT K1 (chip_id 0x1000)WhatsMiner Gen 128nm (legacy)WhatsMiner M1, M2, M3, M5, M6, M7 (M3 v10-v50)per modelunverified0x1000see model spec
MicroBT K2 (chip_id 0x1800)WhatsMiner Gen 216nmWhatsMiner M8, M10, M11, M12 (M8-M12 line)per modelunverified0x1800see model spec
MicroBT K3 (chip_id 0x1920)WhatsMiner Gen 37nmWhatsMiner M19, M20, M20S (and the M50/M60 5nm/3nm extension)per model (M20S ~105)unverified0x1920see model spec
Avalon A3200C-PlusAvalon (A13-series host)7nm (older)Avalon A1346, A1346N (MM317 control)per modelunverifiedsee model spec
Avalon A3198SAvalon (A14-series host)7nm (refined)Avalon A14x, A14xI, A1466HS (MM318_X2 control; air + liquid)per modelunverifiedsee model spec
Avalon A3197SAvalon (A15-series host)5nm-classAvalon A15x, A15xI, A1566HS (MM319 control; air + liquid)per modelunverifiedsee model spec

Nominal core V = the approximate per-chip operating (core) voltage of the silicon, held to a single consistent basis across every row. On a hash board this voltage is regulated per series-connected power DOMAIN, never per individual chip. "—" = not a hash-board chip or no confident core value. BM1370 (S21 Pro / XP, Bitaxe Gamma) shares the BM1366 5 nm class at ~0.40 V core — not the BM1368 ~1.2 V class. S21 / S21 XP carry no PIC controller.

Source: D-Central ASIC Chip Database (Bible-verified: MASTER_CHIP_CATALOG, HARDWARE_REFERENCE, HASHBOARD_DIAGNOSTICS, AUTOTUNER_DESIGN). Voltage column = nominal per-chip CORE voltage. Gamma=BM1370 and Ultra=BM1366 are the 5nm ~0.40 V core class; Supra=BM1368 runs ~1.2 V; S17/T17=BM1397; S21 has no PIC.

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