Standard Bitmain APW12/APW9 connectors pin-by-pin: PSU outputs, the 4-pin I2C signal terminal, the 18-pin hash-board cable, the fan header and the UART debug header.
| Connector | Pin | Signal | Voltage | Notes |
|---|---|---|---|---|
| APW12 J15 — 4-pin signal / voltage-control terminal | 1 | SDA | 3.3V | I2C data line (open-drain, external pull-ups) |
| 2 | SCL | 3.3V | I2C clock line (open-drain) | |
| 3 | EN | 3.3V logic | Enable — ACTIVE LOW; pull to GND to enable PSU output | |
| 4 | GND | 0V | Ground reference | |
| APW12 J3/J4 — OUT1 high-current DC output | J3/J4 (+) | OUT1 +12–15V DC | 12–15V (tunable) | Hash-board power. Up to 233A via multiple parallel pins / copper bus bars. Voltage is set through the J15 I2C control (8-bit DAC). |
| J3/J4 (−) | GND / return | 0V | High-current return | |
| APW12 J6 — OUT2 control-board / auxiliary 12V output | J6 (+) | OUT2 +12V | 12V fixed | 15A max; powers the control board and chassis fans |
| J6 (−) | GND / return | 0V | Return | |
| APW12 J31 — internal PSU fan power | J31 (+) | +12V (auxiliary rail) | 12V | PSU internal cooling fan power |
| J31 (−) | GND | 0V | Return | |
| Hash-board IO connector — 18-pin signal cable (control board ↔ hash board) | 1 | GND | 0V | Ground reference |
| 2 | VCC_3V3 | 3.3V | Logic power from control board (CB→HB) | |
| 3 | RST | 0–3.3V | Reset to the chip chain (CB→HB) | |
| 4 | SDA (I2C) | 3.3V | Temp-sensor / EEPROM data (bidirectional) | |
| 5 | SCL (I2C) | 3.3V | Temp-sensor / EEPROM clock (CB→HB) | |
| 6 | GND | 0V | Ground | |
| 7 | TX / CI | 3.3V | UART transmit — command input (CB→HB) | |
| 8 | RX / RO | 3.3V | UART receive — response output (HB→CB) | |
| 9–18 | Various | — | Additional GND, VCC and status signals — verify against board schematic | |
| Chassis cooling fan header — 4-pin | 1 | GND | 0V | Ground |
| 2 | +12V | 12V | Fan power (from the OUT2 auxiliary rail) | |
| 3 | TACH (sense) | open-collector pulse | Tachometer — fan-speed feedback to the control board | |
| 4 | PWM (control) | logic duty-cycle | Speed-control input from the control board | |
| Control-board UART debug header | — | TX | 3.3V logic | Control-board serial transmit → adapter RX |
| — | RX | 3.3V logic | Control-board serial receive ← adapter TX | |
| — | GND | 0V | Common ground (connect first) | |
| — | VCC | 3.3V | Logic reference — usually leave unconnected when the board is self-powered |
Pin numbering and keying vary by board revision — always verify pin 1 against your specific board before wiring. Never hot-plug a signal cable while power is applied. 3.3V logic; do not feed 5V TTL to the UART header.
Source: D-Central ASIC Power & Connector Pinout Reference (Bible-grounded: PSU_PROTOCOL_BIBLE, HASHBOARD_DIAGNOSTICS, ANTMINER_ARCHITECTURE). Verify pin 1 keying against your specific board.
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© 2026 D-Central Technologies, Laval, Quebec · Free to share under CC BY 4.0 with attribution to D-Central. A reference, not a guarantee — verify against your specific hardware.