FPGA (Field-Programmable Gate Array)

An FPGA (Field-Programmable Gate Array) is an integrated circuit built from a grid of configurable logic blocks and programmable interconnects, so its digital circuitry can be defined — and redefined — after the chip leaves the factory. Unlike a fixed-function ASIC, an FPGA is "wired" by loading a bitstream at power-up. In Bitcoin mining hardware, FPGA fabric appears as the programmable-logic section of the Xilinx Zynq SoC on classic Antminer control boards, where it does the timing-critical work that keeps hashboards fed.

FPGA versus ASIC in mining

FPGAs were briefly used as standalone Bitcoin miners around 2011-2012, bridging the gap between GPUs and purpose-built ASICs. They lost that race quickly: a fixed ASIC can pack far more SHA-256 engines per watt than a reconfigurable FPGA, whose flexibility costs silicon area and power. Today the FPGA's job in an Antminer is not hashing at all — it is the high-speed glue logic that streams work and results between the ARM cores and the hashing chips.

What the fabric actually does

On the Zynq 7010 used in the common C55/C71 control boards, the programmable logic is an Artix-7 class fabric with roughly 28K logic elements, and it earns its keep in several distinct roles. Work and command data flow from the CPU over the AXI bus into FPGA-implemented FIFOs, then out through UART transmitters — one per hashboard, through level shifters — with nonce results returning the same way. The fabric also generates the VID voltage-control signalling for the hashboards, drives GPIO and fan PWM, runs CRC engines for the chip protocol, and hosts an I2C controller shared across the hashboards for PIC and temperature-sensor traffic. Linux reaches all of this through a kernel driver that maps a few kilobytes of FPGA registers into userspace. The bitstream itself ships inside the signed boot image, and on stock firmware it is RSA-verified at boot.

Not the only way to do it

The FPGA approach is elegant but not mandatory. Later Antminer control-board generations — BeagleBone-based and Amlogic-based designs — dropped the FPGA entirely and drive the hashboards with software UART from the CPU, proving the fabric's function can be replicated in software at the cost of CPU load and less deterministic timing. Meanwhile the open-source community mapped the FPGA side thoroughly: the braiins zynq-io project published an open FPGA design for Antminer-class I/O, and the BCB100 open-hardware control board built on the same foundations. Anyone hacking on mining controllers today stands on that documentation, and it is a big part of why third-party firmware and replacement control boards exist at all.

The bench view

It is telling that the open-source mining renaissance largely skipped the FPGA. The Bitaxe and its ESP-Miner-based relatives drive their hashing chips with an ordinary microcontroller and software serial handling — the small chip counts simply do not need hardware FIFOs, which keeps the bill of materials cheap and the design approachable for anyone with a soldering iron. Industrial machines with hundreds of chips per hashboard and multiple boards per unit are where the FPGA's deterministic, parallel I/O still earns its silicon. The pattern generalizes across embedded engineering: FPGAs win when many fast, timing-critical channels must run concurrently, and software wins everywhere else — mining hardware just happens to demonstrate both ends of that spectrum in one product line.

For a repair bench, the FPGA is mostly invisible when healthy and decisive when not: if the fabric fails to configure at boot, the control board comes up with no hashboard communication at all, which is worth ruling out before condemning three perfectly good hashboards. For the larger picture of how the FPGA combines with a CPU on one die, see System-on-Chip (SoC); for the specific part used in Antminers, see Zynq SoC; and for the boards it talks to, see hashboard.