Redundancy Repair

Redundancy repair is the technique foundries use to salvage chips that contain a small number of manufacturing defects. Rather than scrap a die because one memory cell or logic block is faulty, designers build in spare rows, columns, or functional units. During wafer test, the exact locations of defects are mapped, and the chip is reconfigured so that accesses to a bad element are silently redirected to a good spare. A die that would have been a total loss leaves the fab as a fully working part, and the customer never knows the difference.

How the swap is made permanent

The redirection has to survive for the life of the part, so the repair address is burned into hardware rather than held in software. Traditional DRAM repair blows tiny metal links with a focused laser while the wafer is still unpackaged — the classic "laser fuse" process. Modern parts increasingly use electrically programmable fuses that can be blown after packaging, sometimes even in the field. Either way, once the fuse array encodes which spare replaces which defective element, decode logic routes around the flaw transparently on every subsequent access. The same one-time-programmable structures used for repair also store chip IDs and security bits, which is why the e-fuse shows up in both yield engineering and firmware-security discussions.

The yield payoff and its limits

Redundancy repair is one of the most powerful weapons against defect density: it directly converts otherwise-killer defects into recoverable ones, lifting the number of salable dies per wafer. The trade-off is overhead. Spare rows and blocks occupy silicon area whether they are ever used or not, and a repair typically retires a whole row or block to mask a single bad bit. Memory arrays, with their extreme regularity, benefit most; random logic is far harder to spare out, which is why repair coverage is always partial. Past a certain defect count, no amount of redundancy saves a die, and it is binned down or scrapped.

The mining-ASIC parallel

Bitcoin mining silicon leans on a looser version of the same philosophy. A SHA-256 ASIC is a sea of identical hash cores, and a localized flaw that kills a few cores does not have to kill the chip — the part can ship at a lower bin, hashing slightly slower, rather than being discarded. Structure the array so a defect disables a small block instead of the whole die, and yield economics improve exactly as they do for DRAM spares. This tolerance is one reason mining chips reached enormous die counts per wafer while staying affordable.

On the repair bench

It is worth separating on-die redundancy from board-level repair, because the two get confused. Once a chip is soldered to a hashboard, there are no spares left to swap in silently. An S19 board carries 76 BM1398 chips wired in series domains, and a single dead chip breaks the communication chain for everything behind it — the firmware reports a shortened chain, and hashrate for that board collapses. The fix at this level is physical: locate the failed chip with voltage and signal measurements, hot-air it off, and solder a known-good donor in its place. That is redundancy repair performed by a technician instead of a fuse array, and it is bread-and-butter work on a mining repair bench. If a board in your fleet is showing missing chips, that diagnostic-and-replace workflow is exactly what our repair service does daily.

Redundancy repair is the reason a few defects no longer mean a dead chip — in the fab it is fuses and spare rows; on the bench it is flux, hot air, and a donor chip.