Avalon 1246 – Hashboard Domain Voltage Abnormal

Hard power-cycle at the breaker for 60 seconds, then re-power. Soft reboots via the web UI do not clear every register state on the AUC; a true power-off does. If the fault is a sensor-side ghost (common on 20061900-series firmware, roughly 1 in 20 events), this alone clears it. Watch the kernel log for 15 minutes after boot to confirm.

Pull the full kernel log via http://<miner-ip>/cgi-bin/minerStatus.cgi before you touch anything else. The log captures the exact domain, the exact reading, and the timestamp sequence. Save it — you will want it when you ship to D-Central or post to the Canaan community forum. Without the log, downstream diagnostics are guesswork.

Check ambient temperature and intake airflow. The 1246's LDOs run hot at baseline; a garage at 40 °C can push an already-marginal LDO into fault territory. Verify inlet air ≤ 35 °C, clean the intake filter, ensure 15 cm clearance around the chassis. Thermal is rarely the cause but is the cheapest variable to rule out.

Verify firmware version via the web UI. Known-stable Canaan firmware for the 1246: builds from the 20220105-series forward. Pre-20210801 builds have documented ADC instability that fires PVT_V abnormal on otherwise healthy boards. Canaan blocks firmware downgrade, so confirm any new build works on another 1246 before flashing fleet-wide.

Set DNS to 8.8.8.8 / 1.1.1.1 via the web UI. Default Canaan DNS assumes a China route; outside China, DNS failure can break firmware handshakes which surface as sensor-path timeouts reading as PVT_V flags. Community-documented quirk, not in Canaan official docs.

Measure the PSU rail at the AUC input under full load. Multimeter on DC, probe the 12 V input to the hashboard while the miner is hashing at nameplate. Expect 11.9-12.2 V sustained. Below 11.8 V = PSU is the root cause — the LDO lacks headroom to regulate cleanly. Swap to a known-good APW3++ or APW12. This clears about 25% of PVT_V tickets.

Re-seat every hashboard-to-controller cable. Power off at the breaker, disconnect data ribbon and power, inspect for bent pins / oxidation / scorching, reconnect firmly and listen for the click. A marginal ribbon adds resistance that reads as voltage drop on the hashboard side, which the PVT ADC interprets as abnormal.

Swap hashboards between the three slots. Label slots 0/1/2 with tape. Move the suspect board to a known-good slot, run 20 minutes, pull the kernel log. Fault follows the board = hashboard-level issue, proceed Tier 3. Fault stays with the slot = control board or AUC ribbon, jump to Step 17.

Measure line voltage at the panel under load. Canadian 240 V split-phase: 235-245 V expected. 208 V commercial: 202-212 V. Low line voltage forces PSU current up, increases rail sag, starves LDO headroom. Tired breakers and undersized home panels are a recurring cause of mystery PVT_V flags on residential rigs.

Clean the hashboard with dry compressed air and a soft anti-static brush. Dust bridging between SMT pads on the voltage domains can create micro-leakage paths that surface as PVT drift. Do not use canned air upside-down (propellant ends up on the board).

Re-apply thermal paste on the LDOs and voltage-domain ICs (not the A3206 mining chips — the regulators). Dried thermal compound on LDOs makes them run hot, accelerating drift and pushing output outside spec. Use Arctic MX-6 or Thermal Grizzly Kryonaut. Thin even layer. One-hour job that saves many boards.

Reflow the LDO for the flagged domain. If bench-measured LDO output is out of spec, a reflow often restores it — BGA-style thermal cycling reseats micro-cracks in the solder joints. Preheat bottom side to 150 °C, hot-air topside at 310-330 °C for ~25-30 seconds, let cool naturally. Re-test PVT_V after cool-down plus 30 minutes of hashing.

Replace the LDO if reflow fails. Zeus BTC's A11/A12 repair guide documents the LDO part number (verify against your specific A3206 board revision — two exist). Fresh LDO properly reflowed in place restores the domain. $15-25 in parts, 20 minutes of bench time. Most common 'final fix' for PVT_V abnormal on the 1246.

Inspect and replace MLCC decoupling caps around the flagged domain. Cracked 0402 or 0603 MLCC near the LDO output adds high-frequency ripple that reads as voltage instability on the PVT sample. Visual inspection under magnification then continuity sweep; replace any cracked caps — cheap, fast, high-value repair.

Flash the latest stable Canaan firmware and verify the fault is gone. Only flash forward (Canaan blocks rollback), only with a build confirmed working on at least one other 1246, and never via WiFi — the community has documented wireless bricking during mid-update drops. Hardwire via Ethernet always.

Stop DIY when: PVT_V fault persists after LDO replacement, per-chip continuity sweep finds a shorted A3206, or two different domains on the same board flag simultaneously. You are now in chip-replacement or board-level PCB repair territory — test fixtures, programmable loads, graded A3206 stock. Book a D-Central ASIC Repair slot.

D-Central bench process: test fixture loading the 1246 hashboard independently of the control board, per-domain isolation with a programmable DC supply, chip-level PVT sweep using A3206 test vectors, LDO and MLCC replacement, A3206 chip replacement with graded salvage stock when required, full 24-hour burn-in at nameplate before return shipping. Canadian turnaround: 5-10 business days.

Ship safely. Anti-static bags, double-box with ≥5 cm foam on every side, include the kernel log pulled in Step 2, current firmware version, and a note describing the exact PVT_V value and which domain flagged. Complete context cuts diagnostic time in half, which cuts your repair cost.