Bitaxe – USB-C PD Negotiation Failed (Programming Port)

Swap to a USB-IF certified e-marked PD cable, <=1m, with both CC pins terminated. Anker 541/543, Apple Thunderbolt 4, Belkin BoostCharge Pro, or any cable explicitly rated for 60W / 100W / 240W PD. Reject anything unmarked, anything that came free with headphones, anything from an in-flight kit. Power-cycle the Bitaxe; check AxeOS for the PD profile that landed. This single move clears about half of all BITAXE_USBC_PD tickets. Mark the working cable; throw out the bad one.

Swap to a Bitaxe-rated USB-C PD wall wart. Anker 737/747/Nano II series, Apple 67W/96W USB-C, Mean Well GST-USBC series, or D-Central's stocked Bitaxe USB-C PSUs. Minimum 45W for Gamma stock, 65W for Gamma overclocked or GT, 100W for safety margin. Don't use no-name '100W super charger' eBay specials, hotel-lobby kiosks, airplane seat-back PD outlets, or car-cigarette-lighter USB-C adapters — those frequently mis-advertise PDO menus. Plug in, observe the negotiation, confirm 9V or 12V lands in AxeOS Status.

Don't plug both USB-C and barrel-jack at the same time on Bitaxe variants that have both inputs. The PD chip and the barrel-input diode fight each other; the input OVP may engage and worse outcomes follow. Pick one input source, confirm it works, leave the other unplugged. If both must be present (rare bench scenario), confirm the OR-ing diodes / input switch are explicitly rated for it on your board revision before powering.

Read AxeOS web UI -> Status -> Input Voltage and Power Limit. The number you want: Input Voltage: 12.0V (or 9.0V on lower-tier negotiations), Power Limit: 36W (or 27W). If you see 5.0V / 15W, the negotiation fell back to default and you have BITAXE_USBC_PD. If AxeOS doesn't expose this field, your firmware is older than the PD-aware builds — OTA-update first. Power-cycle once after every cable / source / firmware change to clear sticky FUSB302 state.

Confirm reset / PD log lines on serial console. Plug USB-C from Bitaxe to laptop. Open serial monitor at 115200 8N1: idf.py monitor, pio device monitor, Arduino Serial Monitor, screen /dev/ttyUSB0 115200, or PuTTY on Windows. Power-cycle the Bitaxe with the suspect source attached. Capture the first 30 seconds. Look for `PD: FUSB302 init OK`, `Source_Capabilities received`, `Request`, `Accept`, `PS_RDY` lines. A clean negotiation prints all five. A failed negotiation prints `init failed`, no `Source_Capabilities`, `Reject`, repeated `HardReset`, or no PD lines at all.

Update AxeOS to the latest stable release that supports your board revision's PD path. AxeOS web UI -> System -> Check for Updates, or manual OTA from the latest bitaxeorg/ESP-Miner release. After update, verify the nvs board profile matches the silkscreen on your physical board — Gamma 601, Gamma 602, Supra rev 3+, GT 800, etc. Mismatch can cause pd_init() to silently disable PD because the wrong driver code path was compiled in. After update + profile fix, power-cycle and re-check Status.

Validate the suspect PD source with a USB PD analyzer. Power-Z KM003C, ChargerLAB KT002, or equivalent. Plug analyzer between source and a known-good sink (your laptop, a phone, a USB-PD load). Read the Source_Capabilities advertisement. A 100W Bitaxe-rated charger advertises 5V / 9V / 12V / 15V / 20V fixed PDOs. If the menu is short (only 5V and 20V, or worse 5V only), the source is the fault — replace it. Don't bother with cable / firmware / chip-level diagnostics on a source that lies in its PDO advertisement; the upstream fault dominates everything downstream.

Probe CC1 / CC2 voltages on attach with a multimeter. Multimeter on DC volts. With a known-good cable and a known-good source plugged in (Bitaxe powered off otherwise), probe each CC pin at the USB-C connector. One of the two should read 1.86V (default current, 3A advertised), 2.1V (Rp = 1.5A), or 2.6V+ (Rp = 3.0A PD-capable). The other reads 0V. Both reading 0V = source isn't asserting Rp, cable doesn't carry CC, or both — diagnose source / cable side first before suspecting the PD chip.

Verify the cable's e-mark and CC continuity with a USB-C cable tester (~$25 on Amazon). Tester reports CC1 and CC2 connectivity, e-mark presence, declared current rating. Charge-only cables fail the CC continuity test. Lying cables (claim 100W, e-mark says 60W or absent) get caught here. Cheap but invaluable for any home-mining bench that handles more than two USB-C cables. Mark the surviving cables; toss the failures.

Tune AxeOS down to stock if the brownout cascade started after pushing tune. From AxeOS web UI -> Settings -> System, set coreVoltage to default (typically 1.20V on Gamma stock) and frequency to default (typically 525MHz). Save and reboot. The PD handshake doesn't change with tune, but a Bitaxe negotiating only 5V default will brown out faster at higher tune. Confirm PD lands at 9V/12V before pushing tune back up. Order: PD first, performance second.

Sniff the PD bus with a logic analyzer. Saleae Logic Pro 8, DSLogic Plus, or any analyzer with USB-PD decoder support. Probe CC1 and CC2 directly at the USB-C connector. Trigger on the rising edge of attach. Capture the first 2 seconds. Decode Source_Capabilities, GoodCRC, Request, Accept, PS_RDY packets. This catches every protocol-layer failure that the AxeOS log abstracts away — including BMC encoding errors, CRC failures, timing-window misses (tSenderResponse, tPSTransition), and cable-orientation flips.

Scope VBUS and CC simultaneously during negotiation. Two-channel oscilloscope, 10x probes, >=20MHz bandwidth. CH1 on VBUS DC-coupled at the connector. CH2 on the active CC line DC-coupled. Trigger on positive slope crossing 1V on CH2. Watch VBUS ramp from 0V -> 5V -> (after Request) 9V or 12V. A successful negotiation shows three voltage plateaus on VBUS separated by clean transitions of ~25ms. A failed negotiation shows VBUS stuck at 5V after the initial detect — and you can read the failure cause off CH2's BMC traffic if your scope has decode.

Bench-replace the FUSB302B PD chip. Hot-air rework station at 300C, fine tweezers, flux, 0.4mm solder. Locate FUSB302B on the Bitaxe board (datasheet pinout, PCB sources in bitaxeorg/ESP-Miner). Lift the dead chip with hot air + tweezers — 45s at 300C, no scrubbing the PCB. Clean the footprint with wick and 99% IPA. Apply fresh flux. Place a new FUSB302B (Mouser, Digi-Key, or LCSC stock — verify the suffix matches the dead chip, FUSB302BMPX vs FUSB302BVMPX). Hot air at 300C for 30s to reflow. Visual inspection under loupe before powering. Cost: $4-$8 for the chip; bench time is the real expense.

Bench-replace the IP6505T PD chip on cost-reduced revisions. Same procedure as FUSB302B but the package is QFN-32 — slightly larger, more pins, slightly more skill. Source: LCSC, AliExpress, or directly from Injoinic Technology. Verify AxeOS firmware supports IP6505T (some early builds were FUSB302-only); if the new chip is a different controller than the original, you're now in firmware-port territory unless AxeOS has merged support upstream. Confirm board revision against silkscreen before ordering replacement parts.

Re-flow the USB-C connector itself. Cracked solder around the Vbus / GND / CC / shield tabs is a real failure mode on Bitaxes plugged and unplugged hundreds of times. Hot air + flux + reflow at 300C for 30s over the connector tabs. Don't yank or pry — let the heat do the work. Re-solder the four mechanical shield tabs by hand at 360C with a T12 tip and 60/40 solder. Verify continuity from Vbus pin to the input filtering, and from each CC pin to the PD chip, before powering. A 5-cent solder joint fixes a chronic intermittent on a well-used Gamma.

Replace damaged input filtering capacitors near the PD chip. If a misprogrammed PD trigger ever fed the Bitaxe 12V or 20V on a 5V/12V design (see ZY12PDN_WRONG_V), the input ceramics may be cracked open from 2x-4x overvoltage. Symptoms: PD chip reports correct negotiation but VBUS reads with significant ripple under load. Visual inspection: cracked, blackened, or visibly damaged 0805 / 0603 MLCCs near the USB-C connector. Hot-air remove, replace with same value (typically 10uF / 25V X7R or X5R). Bigger voltage rating margin = better resilience.

Stop DIY and ship to D-Central ASIC + Bitaxe Repair when: a Bitaxe-rated PD source + e-marked cable + latest AxeOS still falls back to 5V; PD chip visually damaged or fails the CC voltage probe; IP6505T replacement requires AxeOS source patches your build doesn't have; multiple cascade failures (PD chip + TPS546 + barrel-jack damage on the same board); or you don't own a hot-air station / logic analyzer / PD analyzer. Book at https://d-central.tech/services/asic-repair/. We stock FUSB302B and IP6505T spares, every Bitaxe board revision, USB PD compliance test fixtures. 3-7 business-day turnaround. Canada / US / international.

Ship safely. Bitaxe in anti-static bag, double-boxed with >=5cm foam on every side. Include a note with: AxeOS version, board revision (silkscreen), the source / cable combos you tested, the PD log lines from Step 5 (text dump or screenshot), CAD address for return shipping. This saves us 30-60 minutes of intake diagnostics and saves you the equivalent in repair-bench time. D-Central pioneered the Bitaxe ecosystem — Mesh Stand originator, first heatsinks for Bitaxe and Bitaxe Hex — and we know this hardware cold.