On an S17+, hashboard voltage is inconsistent is a pre-flight abort, not a runtime warning. All three chains hang off one APW9+ rail — a single adjustable 14.5–21 V DC output — while each hashboard carries its own factory calibration data in its on-board EEPROM. Before it will hash, the firmware compares what the three boards call for. If they disagree, no single rail setting is right for all three, so the miner exits rather than run a board out of spec. Result: 0 TH/s from a 73 TH/s machine — the whole box down, not one chain degraded.
What the error actually reports
An S17+ hashboard carries 48 BM1397 chips (QFN-34) in 12 voltage domains of 4 chips. Voltage is regulated per domain, never per chip: each domain sits near 1.55 V, and the twelve stack in series to roughly 18.5 V across the board. Three boards, 144 chips.
- The APW9+ output window (14.5–21 V DC, 200 A, 3,600 W at 220 V) brackets that ~18.5 V domain string, so the rail setting the firmware picks has to suit all three boards at once.
- Because the rail is shared, the check is board vs. board, not domain vs. domain: either the boards disagree on the voltage they belong at, or one is not seeing what the other two see.
- Pull the kernel log before you touch hardware — see troubleshooting the S17 series using the kernel log.
Likely causes, most common first
- Mixed hashboards from different machines. Most common by far on second-hand units. Each board’s EEPROM holds its own calibrated voltage and frequency data; boards from different miners carry different values, and the firmware refuses the mismatch. Three electrically perfect boards still throw this.
- Voltage lost in one board’s power path. A burnt, oxidised or loose power terminal drops enough under a 2,500–3,100 W load that one board’s rail reads below the other two. The board is fine; the copper feeding it is not.
- Wrong PSU. An APW9 (170 A, spec’d for S17 / S17 Pro / T17) fitted to an S17+ that wants an APW9+ (200 A) sags as the machine ramps. An S17+ pulls ~2,500 W at 520 MHz (68 TH) and ~3,100 W at 600 MHz (78 TH). The overclock profiles (715 MHz / 93 TH / ~4,050 W) exceed the 3,600 W an APW9+ is rated to deliver at 220 V — not a stock-PSU operating point.
- A failed domain on one board. A shorted chip or dead domain regulator pulls its domain toward zero and drags the string down, so that board no longer matches the other two.
- Corrupt EEPROM. A failed I2C write or an ESD event leaves a board reporting a value it was never calibrated to. Presents like a mixed board.
Diagnose before you desolder anything
- Read the board IDs. If serials or board revisions differ across the three chains, you have your answer — go to the EEPROM step.
- Run one board at a time. Boot with a single hashboard fitted, then repeat for each. If every board initialises alone but any pair throws the error, the boards are mismatched, not broken.
- Rotate the board, not the chain. Move the suspect board to another chain position with a different ribbon and power cable. Fault follows the board → it is the board. Fault stays with the position → harness or PSU output.
- Reseat the 18-pin ribbon and torque the power screws. The ribbon carries 3.3 V logic plus the I2C SDA/SCL pair the EEPROM and temp sensors share; a marginal seat gives flaky reads.
- Confirm the supply. Verify an APW9+ on 200–240 V. An APW9/APW9+ will come up on 110/120 V at reduced output — exactly how an S17+ browns out as it ramps, boards then disagreeing.
Electrical measurements
Safety, correctly scoped: domain rails are low-voltage DC — 1.55 V per domain, ~18.5 V across the string. Not a shock hazard. The PSU is: PFC capacitors in an APW supply hold 410–420 V DC after unplugging. Measure on the board; leave the PSU shell closed.
- DMM on DC volts, millivolt resolution. An oscilloscope is the wrong instrument — you are comparing DC levels, not hunting ripple.
- Handling: power down and wait 30 seconds before removing or reseating anything, and work on an anti-static mat. Measurements 4–6 are taken with the miner running.
- Black probe to board ground, never a heatsink — a heatsink can sit at a domain’s local potential, so referencing to it gives a meaningless reading, and a probe that slips between two heatsinks bridges a domain.
- Under load, let the board stabilise 2–5 minutes, then measure VDD_IN at each board’s own power terminals. All three should sit within a couple hundred millivolts. A board low by several hundred millivolts at its own terminals lost it in the cable and connector, not the board.
- Walk all 12 domain boundaries, high side to low side. Healthy: every domain within ±50 mV of the others. 100 mV or more below average is a partial short — failed chip or blown decoupling cap. A domain reading high is an open: cracked joint or broken trace.
- Sum the twelve domains: it should land near 18.5 V. A total well off the other two boards is what the firmware objects to.
- Read the EEPROM on all three boards with a programmer or test fixture and compare byte for byte. Differing calibration data confirms cause 1.
Board-level repair
- Mismatched or dead EEPROM: read the EEPROM from a board the machine accepts and write matching data to the odd one out, so all three carry consistent values — the whole fix for mixed-machine boards. If the IC will not read or write, replace it and program it.
- Out-of-family domain: isolate to the domain, then to the chip or that domain’s regulator. Pulled low almost always means a shorted chip; sitting high means an open in the string.
- Power path: replace burnt terminals and cables outright. Reflowing solder joints does not fix a calibration mismatch — that is leftover advice from chain-detection faults.
Past your bench? Start a repair; regulators, connectors and EEPROMs are on the ASIC repair parts page.
Verify the fix
- All three chains enumerate 48/48 chips, 144 total. Fewer means you cleared the voltage fault but left a chain fault.
- Re-measure under load: domains within ±50 mV, string near 18.5 V.
- Check the profile at the wall: 520 MHz should land near 68 TH at ~2,500 W. Hashing but drawing well over that means a power-path problem remains.
- Soak two hours — connector and calibration faults reappear once the rail is warm.
Common mistakes
- Chasing ~0.8 V readings. 0.8 V is a per-chip core rail, not a domain voltage — and S19-family domains are only 0.32–0.36 V (2–3 chips each). An S17+ domain is ~1.55 V across 4 chips; the wrong baseline condemns a healthy board.
- Talking about “per-chip voltage”. There is no per-chip regulator: four chips share one domain rail, and the domain is the smallest thing you can adjust or condemn.
- Blaming heat. This check runs at startup, before thermal load. Cooling faults raise temperature errors, not voltage errors.
Related
- ASIC Fault Finder — symptom → fault path.
- “Power supply voltage is unstable” on Antminer S17 — the rail-side sibling of this fault.
- APW9 / APW12 PSU problems and solutions.
