Bitmain Antminer L3++ (596Mh)

The Bitmain Antminer L3++ is a 2018 Scrypt miner built from 288 BM1485 ASICs across four hashboards, rated around 580–596 MH/s at roughly 1,050 W (about 1.76 J/MH) for Litecoin and merge-mined Dogecoin. It is a 28 nm, BeagleBone-controlled refresh of the L3+, clocked higher for more hashrate.

Because it runs Scrypt rather than SHA-256, the L3++ lives in a different world from the S9/S19-era Antminers most people picture. Different chip, different algorithm, different coins, and a control board that has more in common with a hobbyist single-board computer than with a modern hash-dense data-center machine. Below is the complete picture — chip and board architecture, real power behaviour, firmware reality, and what actually breaks — grounded in our own teardown and repair experience with this hardware since it shipped.

Chip and hashboard architecture

The L3++ is driven by Bitmain’s BM1485, a Scrypt-specific ASIC fabricated on a TSMC 28 nm process. Each BM1485 carries 12 Scrypt cores, and Scrypt’s memory-hard design means every chip pairs its hashing logic with on-die SRAM — the reason a Scrypt die looks and behaves very differently from a lean SHA-256 part like the BM1387 in an S9.

A complete L3++ uses four hashboards, each populated with 72 BM1485 chips, for 288 chips total. On each board the chips are organised into 12 voltage domains of 6 chips each. This is an important accuracy point that trips up a lot of spec sheets: voltage is regulated per domain, not per chip. The six chips inside a domain are wired in series and share one regulated rail at roughly 0.80 V, so a board’s series string sits at about 9.6–10 V end to end. When a single chip in a domain shorts or opens, it is the whole domain — and often the whole board — that misbehaves, which is central to how these units are diagnosed.

The BeagleBone control board

Where Antminer’s SHA-256 line of the same era used a Xilinx Zynq SoC with FPGA acceleration, the L3+/L3++ uses a TI AM335x “Sitara” controller — a single-core ARM Cortex-A8, BeagleBone-class board with no FPGA. All ASIC communication is handled in software over UART, and chain control runs directly off the AM335x GPIO: chain-present detect and per-chain reset are wired to general-purpose I/O pins (sysfs GPIO), not to a dedicated PIC microcontroller as on the Zynq hashboards. The unit boots from a microSD card inside the case rather than from soldered NAND, which has direct consequences for reliability and recovery (covered below).

Real-world power and efficiency

Nameplate figures for this generation are honest but optimistic. Bitmain rated the L3++ near 580 MH/s; the commonly measured bin is closer to 596 MH/s, and at the wall it draws on the order of 1,050 W. That lands efficiency at roughly 1.76 J/MH. Note the unit: Scrypt hashrate is measured in megahashes per second (MH/s), and efficiency in joules per megahash (J/MH) — not the J/TH used for SHA-256 machines. Comparing an L3++’s “J/TH” figure against an S21 is meaningless; they hash entirely different functions.

The L3++ is simply the L3+ pushed harder. The original 2017 L3+ ran about 504 MH/s at ~800 W (~1.59 J/MH); the “++” is the same 288-chip BM1485 hardware binned and clocked up for more hashrate, at the cost of slightly worse efficiency. Stock firmware boots the BM1485 at a conservative default frequency (the factory cgminer config ships at 384 MHz) and the higher-rated models reach their numbers by clocking the chips up from there.

Tuning headroom on a 28 nm Scrypt part is modest compared to modern miners — there is no autotuner doing runtime per-domain optimisation here, just a frequency setting and the thermal envelope of an eight-year-old design. If you want to model wattage-versus-hashrate trade-offs before you commit, our ASIC power profiles database is the place to start; treat any L3++ undervolt/underclock as a hand-tuned experiment rather than a turnkey preset.

Firmware compatibility

Stock firmware on the L3++ is a Bitmain-maintained cgminer fork for Scrypt (the “cgminer-ltc” package), launched with the --scrypt flag and configured through the familiar Antminer web UI. It is not the bmminer binary used on SHA-256 Antminers — the L3 line keeps its own Scrypt mining stack.

Third-party firmware reality is narrower than newer miners. Community Scrypt firmwares did exist for the L3+/L3++ during its prime and could squeeze out modest tuning and management features. What does not exist for this platform is BraiinsOS+, the only firmware that natively speaks Stratum V2 — Braiins targets the SHA-256 S9-family, so the L3++ cannot run native Stratum V2 regardless of pool support. Anyone telling you a BM1485 box does Stratum V2 is mistaken.

The good news is that the AM335x/BeagleBone control board is one of the most thoroughly understood platforms in mining. Its GPIO chain-control wiring is well-documented, which makes the L3++ a clean target for open, auditable firmware work. D-Central’s own open firmware effort, DCENT_OS (GPL-3.0, currently in closed beta), treats this BeagleBone-class GPIO map as a reference design for legacy and Scrypt-class hardware. We credit the firmware authors who reverse-engineered these boards before us; the goal is one more layer of sovereignty over your own machine, not a lock-in.

Common faults and troubleshooting

After years of these on the bench, L3++ failures cluster into a few predictable buckets:

• Won’t boot / no web UI. Because the L3++ boots from an internal microSD card, a corrupted or worn card is the single most common “dead” symptom. Re-imaging the SD with a fresh recovery image revives a surprising number of “bricked” units before any board work is needed.
• One board missing → ~75% hashrate. With four hashboards, losing one drops the unit to roughly three-quarters of rated hashrate and shows up as a chain reporting zero. The cause is usually a failed domain rather than the whole board.
• Domain and chip faults. A shorted chip pulls its domain voltage low and can current-limit the whole board; an open chip breaks the serial signal chain so every chip downstream of it goes invisible. Healthy domains read within about ±50 mV of each other — a domain 100 mV+ low points at a partial short, while a domain reading high points at an open circuit or cracked solder joint.
• Cooling and tach faults. Dust-clogged heatsinks and dual-fan tach errors are routine on hardware this age; the controller reads fan speed over GPIO and will fault out if a fan stalls.

For a structured walk-through of these symptoms, our ASIC fault finder maps observed behaviour to likely root cause, and the error-code reference decodes the specific strings the miner logs. Domain-voltage measurement on a powered test fixture — black probe to board ground, never to a heatsink — remains the definitive way to localise a bad domain.

Repair and longevity

The L3++ is genuinely repairable, and that is the main reason these units are still running in 2026. The 28 nm BM1485 is a robust, low-density part by modern standards, and the failure modes are well understood: SD-card refresh, fan replacement, domain/chip-level board repair, and PSU service. D-Central has repaired ASIC hashboards in-house since 2016, and Scrypt boards like these are squarely within that work — chip-level diagnosis, reballing or chip replacement on a failed domain, and full board-level testing. If your L3++ has dropped a chain or won’t hash, our ASIC repair service can diagnose at the domain and chip level rather than condemning a whole board.

Longevity-wise, the limiting factor is rarely the silicon — it is consumables (fans, the microSD card, thermal interface) and the economics of running a ~1 kW machine for sub-1 GH/s of Scrypt. Keep it clean, keep the SD card backed up, and a well-maintained L3++ will keep hashing for years.

Who it is for and buying

In 2026 the L3++ is a legacy-tier miner, and we are honest about that. It is no longer a serious profit machine against newer Scrypt hardware, but it remains a great fit for a few specific people:

• Learners and tinkerers who want a real, four-board ASIC to understand Scrypt mining, pool setup, and firmware without the cost or noise of a flagship unit.
• Litecoin/Dogecoin merge-miners running for the coins themselves or to point hashrate at a cause, rather than for pure ROI.
• Space-heater operators. At ~1,050 W the L3++ dumps roughly 3,583 BTU/h of heat. Ducted into a workshop or garage in a cold climate, that turns money you would have spent on heating into a little Scrypt hashrate — the most defensible use case for hardware in this efficiency tier.

At roughly 4.6 kg and 188 × 130 × 352 mm it is compact and easy to place, but it is still data-center-loud, so plan for a basement, garage, or detached space. If you are shopping for a tested unit or want a refurbished Scrypt miner gone over by people who actually repair them, browse the D-Central catalog or talk to us about what is in stock.

Generational context

The L3++ sits at the tail end of Bitmain’s 28 nm Scrypt line. The lineage runs from the original L3+ (2017, ~504 MH/s) to this higher-clocked L3++ (2018, ~580–596 MH/s), both on the BM1485 and the BeagleBone control board. The next real jump was the Antminer L7 (2021), which moved to the 7 nm BM1489 and roughly 9,500 MH/s at ~3,425 W — about an order of magnitude more hashrate at a fraction of the J/MH — followed by the L9-class machines that pushed Scrypt efficiency further still. Credit where it is due: the L3++ was the workhorse that made home Scrypt mining accessible for years, and the architecture pioneered here (BeagleBone control, GPIO chain management, the cgminer-ltc Scrypt stack) is exactly the groundwork later generations and open firmware projects built on.