How to fix “Chain only find 0 ASIC” on Bitmain Antminer S19j Pro ASICs

On an Antminer S19j Pro, Chain only find 0 ASIC means the control board pushed an address-assignment sweep down one hashboard’s serial chain and got nothing back — not a low count, zero. Each S19j Pro hashboard carries 126 BM1362 chips (5 nm) wired as one daisy chain across 42 voltage domains of 3 chips each, so a single break in that loop — dead crystal, collapsed boost rail, cracked ribbon connector, one shorted chip — can silence all 126 at once. Zero is a chain-integrity number, not a chip-mortality number: most of these boards are triaged without a soldering iron.

What the error actually reports

• check_asic_number_with_power_on: Chain[1]: find 0 asic, times 0
• check_asic_number: Chain 1 only find 0 asic, will power off hash board 1

Chain[0]/[1]/[2] is the board, not the chip. times 0 is the retry counter. find 0 asic means no valid response came back on the read-back line.

Enumeration walks forward chip 1 → 126 over CI/CO; each reply travels backward along RO → RI from the last chip to chip 1 and out to the controller. Break the forward path at chip 1, break the return path at the head of the chain (chip 1’s RO, the level shifter, or the RX line back to the controller), or kill the 25 MHz clock, and the count is 0 no matter how healthy chips 2–126 are. Break either path mid-chain and you get a partial count instead: any non-zero count below 126 is a mid-chain break and a different repair. 0 is a board-wide power, clock, or head-of-chain fault. Pull the full log first: how to copy the kernel log into text form.

Check the badge before ordering parts. The S19j Pro is BM1362; the plain S19, S19 Pro and T19 use the BM1398 — different chip, chip count and domain layout. If your badge reads S19 Pro, use the S19 Pro guide instead.

Likely causes, ranked

1. Signal cable or connector. The 18-pin ribbon carries 3.3 V, ground, CI (TX), RO (RX), RST and temp-sensor I2C. A bent pin or half-seated latch kills the chain. The 25 MHz clock is generated on the hashboard by Y1, not carried over the ribbon.
2. Boost circuit failure. Dead boost MOSFET, inductor or boost IC → no domain gets its rail → 0 chips, no domain voltage.
3. One shorted chip. A chip shorting internally drags its domain toward zero and can push the boost into current-limit or shutdown — which is why a shorted BM1362 can read as “0 ASIC” rather than “125”. A chip that fails open does the opposite: it breaks signal forwarding and you get a partial count.
4. Crystal (Y1, 25 MHz). No clock, no enumeration — 0 chips while the power tree measures normal.
5. PIC. Symptom is 0 chips with no 3.3 V at the PIC output pin.
6. Cold solder at the head of the chain. A cracked joint on chip 1’s CO, CLKO or NRSTO pin, or a domain-boundary resistor, breaks signal forwarding while the chip is alive.

Diagnose before you desolder anything

1. Reseat both ends of the ribbon, inspecting the connector for bent pins, then swap in a known-good cable.
2. Swap the chain position. Suspect board onto a known-good chain connector, known-good board onto the suspect chain. Fault follows the board → hashboard; fault stays on the chain number → control board or that connector.
3. Inspect at 10×. With the board out (see how to remove the hashboard), look for burnt or missing components, a cracked crystal, corrosion and cracked traces.

Electrical measurements

Safety, stated correctly. The 0.30 V domains and ~12.6 V board rail are not a shock hazard — probe them freely. The PSU is the dangerous part: the APW12 is 200–240 V input only and its PFC caps hold ~400 V after unplugging. The risk on the board is to the board: never touch a heatsink with the black probe, you will short a domain.

1. Unpowered — power-bus resistance. Wait 30 s for discharge, then measure across the main power input: expect several ohms. Near-zero is a dead short (power MOSFET, boost part, punctured filter cap) — find it before powering up.
2. Unpowered — domain impedance sweep. Resistance mode: black probe on a board ground pad, red probe on each domain’s VDD test point. All 42 should read consistently — low = short in that domain, high = open.
3. Powered — boost output. On a test fixture, confirm roughly 19 V from the boost stage. Absent → boost MOSFET, inductor or boost IC.
4. Powered — domain voltage sweep. Stabilise 2–5 min, then walk all 42 domains with a millivolt-resolution DMM. The domains sit in series across the ~12.6 V rail; nominal is ~0.30 V per domain:
   • All within ±50 mV → power tree healthy; the fault is clock, PIC or signal.
   • 100 mV or more below average → partial short in that domain. That is your chip.
   • Well above average → open domain, drawing no current.
5. Powered — PIC rail. Measure the PIC output pin: you expect 3.3 V.
6. Scope. Probe CLKI at chip 1 for a clean 25 MHz square wave (absent → Y1 dead or trace broken; ringing → aged crystal or loading cap). Then probe CI at chip 1 and decode UART at 115200 8N1: the 0x55 0xAA preamble and SET_CHIP_ADDR should be going out. Commands out with nothing back on RO puts the break in the chain.

Thermal-camera shortcut: on a test fixture, enumerate with the heatsink off — short duration only, the minimum time needed to grab the frame, or you cook the chips. A hot spot is your short; a cold chip among hot neighbours never woke up.

Repair

• Reflow before you replace. Many “dead” BM1362s are cracked joints from thermal cycling, not dead silicon. If domains and clock are clean, reflow chip 1 and the domain-boundary CLK/CI resistors first.
• Then replace. If reflow does not restore enumeration, replace the BM1362 — never a BM1398. Parts: ASIC repair parts.
• Suspect the passives. A shorted decoupling cap reads like a shorted chip on the impedance sweep. Check caps before pulling a chip.

Verify the fix

Reinstall, power up, pull the kernel log again: you want 126 ASIC found. 126 chips at low hashrate is not a pass — hash an hour under thermal load, because a marginal joint enumerates cold and fails hot. Confirm all three boards report.

Common mistakes

• Talking about “per-chip voltage.” There is no per-chip regulator — voltage is regulated per domain, 3 chips to a rail. You measure and repair domains, not chips.
• Running an APW12 on 120 V. It is 200–240 V input only. The older APW3/APW5/APW7/APW8/APW9 family runs on 110/120 V at reduced output; the APW12 will not.

Related

• ASIC Fault Finder — match a log string to a fault path.
• Start a repair — our bench does BM1362 chip-level work.