Bitcoin Mining Facts Canon

# Does an ASIC control voltage per chip?

Common misconception Voltage is controlled "per chip" / there is "per-chip voltage control".

Verified No. Voltage is regulated PER VOLTAGE DOMAIN, not per chip. Several ASIC chips share one DC-DC / LDO regulator, and they are wired in series for core voltage, so the domain voltage is what is set — never an individual chip.

On a hash board, chips are grouped into "voltage domains" — clusters that share a common regulated power rail. The chips in a domain are series-wired for core voltage, so a regulator sets the whole domain, not one die. This is why a single shorted chip drops the entire domain voltage. "Per-chip voltage" is the single most-repeated ASIC error online; tuning happens at the domain (and frequency at the chip), never voltage at the chip.

Source: HASHBOARD_DIAGNOSTICS (voltage-domain structure; per-domain LDO)DocumentedReviewed Jun 2026

# Why does one bad chip kill a whole voltage domain?

Common misconception A single chip failure only affects that one chip.

Verified Because chips in a domain are wired in series for core voltage and share one regulator. If one chip shorts internally, the domain voltage collapses, so the entire domain (every chip on that rail) stops hashing — not just the failed die.

Series-wiring inside a domain is what makes a "0 chips found" or "chips X-Y missing" fault map to a whole domain rather than a lone chip. It is also why diagnosis is done at the domain level: an abnormal voltage between domains points at a chip or the power-management chip within that one domain.

Source: HASHBOARD_DIAGNOSTICS (single-chip failure -> domain voltage drop; abnormal-domain-voltage diagnosis)DocumentedReviewed Jun 2026

# How many voltage domains does an S19 hash board have?

Verified An S19-family hash board has 38 voltage domains. On the S19, each domain carries 2 chips (76 total); on the S19 Pro, each carries 3 chips (114 total). Per-domain voltage is roughly 0.36 V (S19) / 0.32 V (S19 Pro).

The domain count (38) is fixed across the S19 family; what changes is the chips-per-domain population. Per-domain voltage is the regulated value — never per chip.

Source: bible-facts.md (board-architecture table); HASHBOARD_DIAGNOSTICSDocumentedReviewed Jun 2026

# How many voltage domains does an S21 hash board have?

Verified The S21 / T21 (BM1368) board has 12 voltage domains with 9 chips per domain (108 chips). The S21 XP (BM1370) board has 13 domains with 7 chips per domain (91 chips). Per-domain voltage is ~1.2 V (S21) / ~1.04 V (S21 XP).

The S21 generation uses far fewer, higher-population domains than the S19 (12-13 vs 38). The S21 has three LDOs per domain. None of these boards has a PIC.

Source: bible-facts.md (board-architecture table); HASHBOARD_DIAGNOSTICS (3 LDOs per domain on S21)DocumentedReviewed Jun 2026

# Is frequency tuned per chip or per domain?

Common misconception Frequency and voltage are both set the same way.

Verified They differ: FREQUENCY is tuned per chip (each chip has its own PLL the autotuner can set), while VOLTAGE is regulated per DOMAIN (a group of chips shares one regulator). Conflating the two is the root of the "per-chip voltage" error.

This pairing — per-chip frequency, per-domain voltage — is the precise mental model. The autotuner adjusts per-chip frequency within a domain's shared voltage to hit a target. Saying "per-chip voltage" mixes up the two control axes.

Source: POWER_PROFILES_CATALOG ("autotuner adjusts per-chip frequency"); HASHBOARD_DIAGNOSTICS (per-domain voltage)DocumentedReviewed Jun 2026

# How is the high input voltage stepped down to chip voltage?

Common misconception The PSU directly feeds chip voltage.

Verified On the board, an LDO/regulation chain steps the high rail down toward core voltage (e.g. 19 V -> 1.8 V -> 0.8 V per domain on older boards; the S21 uses three LDOs per domain). The PSU supplies the board rail; the board regulates per domain.

There are two regulation stages: the PSU sets the board input (e.g. ~12-15 V on APW12), then on-board regulators bring it to the per-domain core voltage. A fault anywhere in that chain shows as an abnormal domain voltage.

Source: HASHBOARD_DIAGNOSTICS (LDO: 19V -> 1.8V -> 0.8V per domain; 3 LDOs/domain on S21)DocumentedReviewed Jun 2026

# What is the "boost" voltage on S19 boards?

Verified Some S19-family boards use a boost converter to raise the input rail before per-domain regulation (e.g. the S19 boosts ~14 V toward ~19 V; the S19 Pro ~12.6 V toward ~20 V). It is a board-level power-topology detail, distinct from per-domain voltage.

The boost stage feeds the series-wired domains; if it fails, the whole board loses voltage. It is one more reason S19 vs S19 Pro boards are not interchangeable — their boost topology differs along with chip population.

Source: bible-facts.md (board-architecture boost column); HASHBOARD_DIAGNOSTICSDocumentedReviewed Jun 2026

# Do all miners put the same number of chips in a domain?

Common misconception Every domain has the same chip count across models.

Verified No. Chips-per-domain varies by model: S9 ~3, S19 = 2, S19 Pro = 3, S21 = 9, S21 XP = 7. The general guidance "about 10 chips share a DC-DC" is an approximation — the exact figure is per-model.

The "10 chips share a regulator" heuristic explains why voltage is per-domain, but the precise count differs per board. When diagnosing, use the model's actual chips-per-domain to map a faulty chip to its domain.

Source: bible-facts.md (board-architecture chips/domain column)DocumentedReviewed Jun 2026

# Does the Antminer S21 have a PIC microcontroller on its hash board?

Common misconception The S21 hash board has a PIC chip (like the S9/S19).

Verified No. The S21 generation has NO PIC on the hash board — the PIC microcontroller was removed starting with the BM1368 (S21) generation. S9- and S19-era boards have a PIC (e.g. U3 PIC16F1704); the S21 does not.

Earlier Antminer boards used a PIC microcontroller (and an EEPROM) for board identity and power sequencing. From the BM1368 / S21 generation onward Bitmain dropped the PIC. Repair workflows that tell you to "reprogram the S21 PIC" are wrong — there is none to reprogram; the board identity/sequencing moved off-PIC.

Source: HASHBOARD_DIAGNOSTICS (board controller inventory: "No PIC chip (removed in BM1368 generation)")DocumentedReviewed Jun 2026

# What clock speed does the Antminer Zynq control-board CPU run at?

Common misconception The Zynq runs at 700 MHz (or 650 MHz / 1 GHz).

Verified 667 MHz. The Xilinx Zynq-7010 control board (S9, S15, S17 generations) runs a dual ARM Cortex-A9 at 667 MHz — not 700 MHz.

The Zynq-7010 SoC pairs a dual-core Cortex-A9 (667 MHz) with an Artix-7 FPGA fabric that drives the 18-pin hash-board interface. "700 MHz" is a common rounding error. The exact figure matters when reasoning about boot timing and the BOOT.bin / FPGA bitstream.

Source: ANTMINER_ARCHITECTURE (Zynq control board: "Dual ARM Cortex-A9 @ 667MHz")DocumentedReviewed Jun 2026

# What is on the Braiins BCB100 open control board?

Common misconception The BCB100 is just a Bitmain control board / a Raspberry Pi.

Verified The Braiins BCB100 open control board uses an STM32MP157CAB3 (dual Cortex-A7 @ ~650 MHz + a Cortex-M3 coprocessor), 128 MB RAM and 4 GB eMMC. It is the open-hardware part of the BraiinsOS+ stack (credit Braiins).

Braiins open-sourced the BCB100 control board design. The board hardware is open; the BOSminer/boser binaries and the web UI are not. Crediting Braiins here matters — they did the open-hardware work, and conflating "open board" with "open firmware" is a common mistake (see the BraiinsOS open-source entry).

Source: ANTMINER_ARCHITECTURE / EXISTING_FIRMWARES (BCB100 spec; Braiins open hardware)DocumentedReviewed Jun 2026

# How is the NAND laid out on Zynq-based Antminers?

Common misconception The firmware lives in one big partition.

Verified Zynq-based Antminers use 8 NAND partitions totalling 256 MB: mtd0 (40 MB, BOOT.bin + kernel, RSA-verified), mtd1 (32 MB, ramdisk, SHA-256-verified and replaceable for custom firmware) and mtd3 (2 MB, signature partition, patchable for firmware unlock), among others.

Understanding the NAND map is what makes custom-firmware flashing and recovery possible on Zynq boards. The ramdisk partition is SHA-256-verified (replaceable), and the signature partition is the unlock point. This is reference-grade information for recovery, not an invitation to defeat any specific vendor protection.

Source: bible-facts.md (NAND partitions); ANTMINER_ARCHITECTUREDocumentedReviewed Jun 2026

# What connector links the control board to the hash boards?

Verified A standard 18-pin ribbon cable. It carries power (3.3 V), ground, CLK, TX/CI, RX/RO, RST and I2C (SDA/SCL for the temperature sensor + EEPROM). Each of the three hash boards has its own ribbon.

The 18-pin interface is consistent across Antminer generations. The I2C pair (pins 4/5) handles the temperature sensor and EEPROM; CLK/TX/RX/RST handle the chip chain. A "chain X find 0 ASIC" fault often traces to this interface or its connector.

Source: HASHBOARD_DIAGNOSTICS (18-pin pinout); bible-facts.mdDocumentedReviewed Jun 2026

# Which Antminers DO have a PIC, and where?

Common misconception All Antminers have a PIC / no Antminers have a PIC.

Verified S9- and S17/S19-era boards have a PIC microcontroller (e.g. the S9 uses U3, a PIC16F1704; later boards use U6 with the EEPROM at U10). The PIC was removed starting at the BM1368 / S21 generation.

The PIC handled board identity and power sequencing on older boards. A "PIC failure" shows as 0 chips found and no 3.3 V output — measured at the PIC pin. None of this applies to the S21, which has no PIC.

Source: HASHBOARD_DIAGNOSTICS (S9 U3 PIC16F1704; later U6; removed at BM1368)DocumentedReviewed Jun 2026

# Why won't mixed hash boards hash together?

Common misconception Any board of the right model will work in any slot.

Verified Each hash board carries an EEPROM with per-board data. If boards have mismatched EEPROM data (e.g. harvested from different units), the controller may refuse to hash. Boards must be matched, and on PIC-era units the PIC/EEPROM pairing matters too.

An "EEPROM mismatch" fault is a real failure mode when mixing salvaged boards. The EEPROM holds calibration/identity; different data per board is read as an inconsistency. This is a common trap when assembling a miner from used boards.

Source: HASHBOARD_DIAGNOSTICS (EEPROM corruption / mismatch faults)DocumentedReviewed Jun 2026

# What control-board platforms do Antminers use?

Common misconception All Antminers use the same control board.

Verified Four main platforms: Xilinx Zynq-7010 (S9/S15/S17, dual Cortex-A9 @ 667 MHz + Artix-7 FPGA), BeagleBone/TI AM335x (late S19j/S19j Pro, software UART, no FPGA), Amlogic A113D (S19 XP and newer S19, quad Cortex-A53), and CVitek CV1835 (S21/T21, dual Cortex-A53).

The platform determines firmware compatibility and recovery method. Zynq boards use an FPGA to drive the chains; BeagleBone and Amlogic drive the hash boards over software UART directly (no FPGA). This is why a firmware built for one platform will not run on another.

Source: ANTMINER_ARCHITECTURE (control-board platform table); bible-facts.mdDocumentedReviewed Jun 2026

# Do Amlogic / BeagleBone Antminer boards use an FPGA?

Common misconception Every Antminer control board has an FPGA.

Verified No. Only the Zynq platform has an FPGA (the Artix-7 fabric). BeagleBone (AM335x) and Amlogic boards drive the hash boards over software UART directly — no FPGA. This is the "Amlogic lock" consideration for custom firmware.

The absence of an FPGA on Amlogic/BeagleBone boards changes how firmware talks to the chips and constrains which custom firmware can run. Treat "this firmware runs on Antminer X" as platform-specific, not model-specific.

Source: ANTMINER_ARCHITECTURE ("Amlogic boards use software UART directly to hash boards (no FPGA)")DocumentedReviewed Jun 2026

# What control chip do Canaan Avalon miners use?

Common misconception Avalon uses the same control board as Antminer.

Verified Avalon miners use Canaan's own RISC-V control silicon: a K210 RISC-V on the A12xx-A32xx generation, and a K230 RISC-V running Linux on the new home line (Nano 3/3S, Mini 3). These are not ARM/Zynq/Amlogic boards.

Canaan develops its own RISC-V control chips, which is why Avalon recovery and firmware differ entirely from Antminer. The K230 home-line move to a Linux-capable RISC-V SoC is recent (2024-2025 home miners).

Source: MASTER_CHIP_CATALOG (K210 / K230 RISC-V Avalon control)DocumentedReviewed Jun 2026

# What is in mtd0 on a Zynq Antminer?

Verified mtd0 (40 MB) holds BOOT.bin (the first-stage bootloader plus the FPGA bitstream) and the kernel zImage, and is RSA-verified. A corrupted or wrongly-flashed mtd0 is a classic "won't boot" cause and the reason recovery uses SD-card boot.

Because mtd0 carries the FPGA bitstream (Zynq drives the chains through the FPGA), it is the most boot-critical partition. RSA verification is why arbitrary BOOT.bin replacement is blocked; recovery goes via the documented SD-card path instead.

Source: ANTMINER_ARCHITECTURE (mtd0 40MB BOOT.bin + bitstream + kernel, RSA verified)DocumentedReviewed Jun 2026

# Which NAND partition holds the root filesystem?

Verified mtd1 (32 MB) holds ramdisk.itb (the root filesystem), SHA-256 verified and replaceable — it is the partition custom firmware swaps. mtd2 (8 MB) holds configs/UBI (cgminer.conf, user settings).

The ramdisk being SHA-256-verified-but-replaceable is what makes custom firmware possible on Zynq boards: replace mtd1 with a matching hash. Your settings live separately in mtd2, which is why a firmware reflash can preserve or wipe config depending on scope.

Source: ANTMINER_ARCHITECTURE (mtd1 32MB ramdisk SHA256 REPLACEABLE; mtd2 8MB configs/UBI)DocumentedReviewed Jun 2026

# What NAND chip do Zynq Antminers use?

Verified Zynq-based Antminers commonly use a 256 MB Winbond W29N02GZ NAND (some 512 MB), paired with 256 MB (or 512 MB) of DDR3. The 8-partition layout (mtd0-mtd7) fits within the 256 MB.

Knowing the physical NAND part matters for off-board recovery and reflashing. The DDR3 is system RAM for the dual Cortex-A9; the NAND holds boot, kernel, rootfs, config, signature and upgrade-staging partitions.

Source: ANTMINER_ARCHITECTURE (256MB Winbond W29N02GZ NAND; 256MB DDR3)DocumentedReviewed Jun 2026

# What ASIC chip is in the Antminer S17 / T17 generation?

Common misconception The S17/T17 uses the BM1393.

Verified The entire S17/T17 base and "e" generation (S17, S17 Pro, T17, S17e, T17e) uses the 7 nm BM1397. BM1393 is a named-only, inferred S9j-family refinement that reports the S9 chip ID — it is NOT the S17 chip.

Older references that list "BM1393 = S17/T17" are wrong. The S17/T17 generation runs the 7 nm BM1397 (672 cores; the 0x1397 dispatch identity). The "Plus" siblings (S17+/T17+) use the BM1396. BM1393 shows up only as an inferred S9j refinement on the shared S9 (0x1387) driver. D-Central corrects this here.

Source: MASTER_CHIP_CATALOG; HARDWARE_REFERENCE; BM1396/1397 + BM1391/1393 disambiguation; bible-facts.md (corrected 2026-06-12)Multi-doc consensusReviewed Jun 2026

# What chip is in the Antminer S9?

Common misconception The S9 uses a BM1397 / BM1370.

Verified The Antminer S9 family (S9, S9i, S9j, T9+) uses the 16 nm BM1387 (~75 GH/s per chip, ~98 J/TH). The whole S9 family shares the 0x1387 chip ID and command surface.

The BM1387 is the canonical S9-era SHA-256 chip. The S9 SE (BM1391, 7 nm) and S9j (BM1393, named-only) are binning / shrink refinements that still report 0x1387 and run the same driver — register-compatible with BM1387, not separate dispatch identities.

Source: bible-facts.md (chip table); MASTER_CHIP_CATALOGDocumentedReviewed Jun 2026

# How many chips per hash board on the S19 vs the S19 Pro?

Common misconception The S19 and S19 Pro have the same chip count.

Verified S19 = 76 chips per board (2 chips per domain). S19 Pro = 114 chips per board (3 chips per domain). BOTH use the same BM1398 chip on a 38-domain board — the difference is chips populated per domain, not a different chip.

Confusing the 76-chip S19 with the 114-chip S19 Pro is a frequent spec error. A genuine BM1398 board is dispatch-compatible, but an S19 board and an S19 Pro board are not interchangeable wholesale — chip population, domain wiring and boost topology differ. Match the board to the model when buying a "Pro".

Source: HASHBOARD_DIAGNOSTICS; bible-facts.md (board-architecture table)DocumentedReviewed Jun 2026

# What chip is in the Bitaxe Gamma?

Common misconception The Gamma uses a BM1366 / BM1368.

Verified The Bitaxe Gamma uses one Bitmain BM1370 (the 5 nm S21-Pro-class die, ~1.2 TH/s on a single chip). The Bitaxe Supra uses a BM1368; the Bitaxe Ultra uses a BM1366; the legacy Bitaxe Max uses a BM1397.

The Gamma=BM1370 mapping is confirmed across 15+ Bible documents and the live AxeOS driver set. (One isolated catalog row mislabels the Gamma chip; it is a known error and is excluded.) The BM1370 is the same 5 nm silicon family as the S21 Pro, which is why a single-chip Gamma reaches ~1.2 TH/s.

Source: bible-facts.md (chip table); deep-Bible consensus (15+ docs); project_bitaxe_gamma_chip_conflict resolutionMulti-doc consensusReviewed Jun 2026

# How many ASIC chips does a Bitaxe have?

Common misconception A Bitaxe has many chips / a full hash board.

Verified A classic Bitaxe carries a SINGLE Bitmain ASIC. Multi-chip open-source boards (Bitaxe Hex, Bitaxe GT, the NerdQAxe and NerdOctaxe family) chain 2-8 of the same chips — but the canonical Bitaxe is a one-chip solo miner.

The Bitaxe was created by skot to put one Bitmain ASIC on an ESP32-S3 board for solo/lottery mining. The "one chip" design is the whole point — low power, low cost, educational. The Hex/GT and the Nerd multi-chip variants exist for more hashrate, crediting their respective designers.

Source: bitaxe.org / OSMU project docs; ESP-Miner board definitionsDocumentedReviewed Jun 2026

# What chip is in the Antminer S21 / T21?

Common misconception The S21 uses the same chip as the S19 / the S21 Pro.

Verified The Antminer S21 and T21 use the BM1368 (~17.5 J/TH class). The S21 Pro, S21 XP and S21+ use the newer BM1370 (5 nm, ~15 J/TH). The two are different chips — the S21 is BM1368, the S21 Pro is BM1370.

The S21 line spans two chips. Treating "S21" and "S21 Pro" as the same silicon is wrong: the Pro/XP moved to the 5 nm BM1370 (the same die as the Bitaxe Gamma). Both are PIC-less generations (see the S21-no-PIC entry).

Source: bible-facts.md (chip + board tables)DocumentedReviewed Jun 2026

# What process node is the BM1370?

Common misconception The BM1370 is a 7 nm chip.

Verified The BM1370 is a TSMC 5 nm chip (~15 J/TH class), used in the S21 Pro / S21 XP / S21+ and in the single-chip Bitaxe Gamma. It is the same 5 nm family as the BM1368, one generation on.

The 5 nm BM1370 is currently the most efficient widely-deployed Bitmain die (~15 J/TH at the model level). Calling it "7 nm" confuses it with the S19-era BM1398. The single-chip Gamma reaching ~1.2 TH/s is a direct consequence of this 5 nm efficiency.

Source: bible-facts.md (chip table); MASTER_CHIP_CATALOG (BM1370 = TSMC 5nm)DocumentedReviewed Jun 2026

# What process node and efficiency is the BM1368?

Verified The BM1368 is a TSMC 5 nm chip at ~17.5 J/TH, used in the Antminer S21, T21 and S21 Hydro, and in the single-chip Bitaxe Supra. It has 12 voltage domains per board.

The BM1368 (0x1368 dispatch ID) opened the 5 nm S21 generation. It is PIC-less (see the S21-no-PIC entry). A single BM1368 on a Bitaxe Supra board does ~0.7 TH/s.

Source: bible-facts.md (chip + board tables); MASTER_CHIP_CATALOGDocumentedReviewed Jun 2026

# What is the BM1366 and where is it used?

Common misconception The BM1366 is the Bitaxe Gamma chip.

Verified The BM1366 is a TSMC 5 nm chip (~21.5 J/TH) used in the Antminer S19 XP, S19k Pro and S19 XP Hydro, and in the single-chip Bitaxe Ultra (the Gamma uses the newer BM1370). A single BM1366 on a Bitaxe Ultra does ~0.5 TH/s.

The BM1366 (Bitaxe Ultra) is one chip older than the BM1368 (Supra) and two older than the BM1370 (Gamma). Mixing up the Ultra/Supra/Gamma chips is the most common Bitaxe spec error online.

Source: bible-facts.md (chip table); MASTER_CHIP_CATALOGDocumentedReviewed Jun 2026

# What process node is the S19-family BM1398?

Common misconception The BM1398 is a 5 nm chip.

Verified The BM1398 is a refined TSMC 7 nm chip (~29.5 J/TH) used across the S19 family (S19, S19 Pro, S19j, S19a, T19). It runs 38 voltage domains per board.

The BM1398 is 7 nm, not 5 nm — the 5 nm jump came with the S19 XP (BM1366) and the S21 (BM1368/BM1370). The S19 vs S19 Pro difference is chip population (76 vs 114), not chip type.

Source: bible-facts.md (chip table)DocumentedReviewed Jun 2026

# What process node is the S9-era BM1387?

Common misconception The BM1387 is a 7 nm chip.

Verified The BM1387 (Antminer S9 family) is a TSMC 16 nm chip at ~98 J/TH. It is the oldest chip still commonly traded; its efficiency is roughly 6-7x worse than current 5 nm silicon.

At 16 nm and ~98 J/TH, the S9 is only economic with very cheap power or as a heat source. Its successor refinements (BM1391 at 7 nm) improved efficiency, but the base S9 chip is 16 nm.

Source: bible-facts.md (chip table)DocumentedReviewed Jun 2026

# What chip is in the S19j Pro / S19j Pro+?

Verified The S19j Pro and S19j Pro+ use the TSMC 5 nm BM1362 (0x1362). These late-S19 units often ship on a BeagleBone (BBB) or Amlogic control board rather than the older Zynq.

The BM1362 is a 5 nm S19j-Pro-class die that pushed the S19 line to better efficiency. Its control-board pairing varies (Zynq, BeagleBone or Amlogic depending on production date), which matters for firmware compatibility.

Source: MASTER_CHIP_CATALOG (BM1362 = TSMC 5nm, S19j Pro family)Driver-confirmedReviewed Jun 2026

# What chip will the Antminer S23 use?

Common misconception The S23 specs are confirmed.

Verified The BM1373 is the projected S23-generation chip. As of this review it is pre-hardware / named-only — every numeric value is a projection, not a measured figure. Treat all S23 specs as rumored until shipping silicon is verified.

We pre-cover upcoming hardware with a confirmed-vs-rumored discipline: the BM1373 / S23 exists as a name and projected positioning, not as a measured part. Anyone quoting hard S23 numbers today is quoting projections.

Source: MASTER_CHIP_CATALOG (BM1373 = pre-hardware, all values projected)Named-only / inferredReviewed Jun 2026

# How does firmware know which ASIC chip it is talking to?

Common misconception It reads a model number from the board.

Verified Firmware dispatches on the chip-ID word the chip returns to a GetAddress command (e.g. 0x1387, 0x1397, 0x1398, 0x1368, 0x1370). The driver is chosen by that hardware-reported ID, not by a printed model name.

This is why re-marked or counterfeit chips are dangerous: the silk-screen can lie, but the chip-ID readback cannot be faked easily. The whole S9 family (incl. BM1391/BM1393) reports 0x1387 and runs one shared driver.

Source: MASTER_CHIP_CATALOG (chip-ID dispatch map: 0x1387->BM1387 ... 0x1370->BM1370)Driver-confirmedReviewed Jun 2026

# How does WhatsMiner control its chips vs Antminer?

Common misconception WhatsMiner and Antminer use the same chip protocol.

Verified MicroBT WhatsMiner K-series chips use a UART command-byte protocol (driven by an Allwinner H-series control SoC), not the Bitmain BM-series command/register surface. The two vendors' chips are not protocol-compatible.

WhatsMiner uses btminer (a CGMiner derivative) on Allwinner H3/H6/H616-class control boards talking to K-series chips over UART. You cannot swap an Antminer hash board onto a WhatsMiner controller or vice versa — different chips, different protocol, different control board.

Source: MASTER_CHIP_CATALOG (MicroBT K-series UART; Allwinner H-series control SoC)Driver-confirmedReviewed Jun 2026

# Why is there no public Avalon tuning/profile table?

Common misconception Avalon tuning data is just unpublished.

Verified Canaan Avalon frequency/voltage tables are AES-encrypted inside the firmware payload, keyed to an OTP fuse on the control SoC (K210 RISC-V on older Avalons; K230 on the home line). They are not recoverable without the on-device key, so a public Avalon tuning table is not shippable. We flag that honestly.

Older Avalons use a K210 RISC-V control chip; the new home line (Nano 3/3S, Mini 3) uses a K230 RISC-V running Linux. The tuning tables are encrypted on-device — the honest-scope box is a credibility feature: we say what we cannot verify rather than guessing.

Source: MASTER_CHIP_CATALOG (Avalon AES-CBC, K210 eFuse OTP; K230 home line)DocumentedReviewed Jun 2026

# What chip is in the Antminer S19 XP?

Common misconception The S19 XP uses the same BM1398 as the base S19.

Verified The S19 XP, S19k Pro and S19 XP Hydro use the 5 nm BM1366 (~21.5 J/TH) — a generation newer and far more efficient than the 7 nm BM1398 in the base S19 family. "S19 XP = S19 chip" is wrong.

The XP was the S19 line's jump to 5 nm. It shares the BM1366 with the single-chip Bitaxe Ultra. Treating the XP as a faster-clocked base S19 misses that it is a different, newer chip.

Source: bible-facts.md (chip table); MASTER_CHIP_CATALOG (BM1366 = S19 XP / S19k Pro)DocumentedReviewed Jun 2026

# What is the difference between the S21 and the T21?

Common misconception The T21 is a different chip generation than the S21.

Verified The S21 and T21 share the same BM1368 chip generation; the T-series is tuned for higher hashrate at lower efficiency (more heat per TH), while the S-series prioritizes efficiency. Same silicon, different tuning/positioning.

Across Antminer history the T-model is the "more hashrate, worse J/TH" sibling of the same-generation S-model (e.g. T17 vs S17, T19 vs S19, T21 vs S21). Useful when heat or raw hashrate matters more than efficiency.

Source: bible-facts.md (chip/board tables); model genealogyDocumentedReviewed Jun 2026

# What is the BraiinsOS+ developer fee?

Common misconception BraiinsOS+ charges a flat 2% (or a flat 2.5%).

Verified BraiinsOS+ charges a 2-2.5% developer fee — a RANGE, not a flat number. It is not "2%" and not "2.5%"; the effective figure depends on configuration. (Credit Braiins for the firmware.)

Quoting a single flat dev fee is the common mistake. The published range is 2-2.5%. For comparison the catalog also tracks VNish at 2-2.8% and LuxOS at 2.8%; stock Bitmain firmware is 0%. DCENT_OS targets a 0% default that the user can optionally raise as a donation (closed beta; public beta summer 2026).

Source: FEATURE_COMPARISON_MATRIX (Dev Fee row: BraiinsOS+ 2-2.5%)DocumentedReviewed Jun 2026

# Which third-party firmware ships native Stratum V2?

Common misconception VNish / LuxOS / multiple firmwares support Stratum V2.

Verified Among shipping third-party Antminer firmwares, only BraiinsOS+ ships NATIVE Stratum V2 (the binary, encrypted, job-declaration protocol). VNish, LuxOS and stock do not. Braiins are the authors of Stratum V2 — credit them.

Stratum V2 is a binary, encrypted protocol with job declaration, authored by Braiins (with Bitmain co-authorship of the spec). As of the last review, BraiinsOS+ is the only third-party firmware shipping it natively. Claiming another firmware "supports SV2" is incorrect; verify against the firmware comparison page, which is re-checked quarterly.

Source: FEATURE_COMPARISON_MATRIX (Stratum V2 row: only BraiinsOS+ = Yes (native)); EXISTING_FIRMWARESDocumentedReviewed Jun 2026

# Is BraiinsOS+ fully open source?

Common misconception BraiinsOS+ is fully open source.

Verified No — only partly. The BCB100 control-board HARDWARE is open, but the BOSminer binary, the boser binary and the web UI are NOT open source. "Fully open source" overstates it. (Credit Braiins for the open-hardware work and for Stratum V2.)

Braiins did real open-hardware work (the BCB100 board) and authored Stratum V2 — both deserve credit. But the mining stack binaries and UI are closed. The accurate statement is "open hardware, closed firmware binaries." This distinction matters for anyone choosing firmware on openness grounds.

Source: EXISTING_FIRMWARES; FEATURE_COMPARISON_MATRIX; bible-facts.md (firmware-feature facts)DocumentedReviewed Jun 2026

# Are ASIC firmware power-profile frequency/voltage values "presets"?

Common misconception The frequency and voltage in a power profile are fixed presets.

Verified No. Modern firmware uses power-targeting: you select a watt/hashrate target and the autotuner CALCULATES the frequency and voltage AT RUNTIME for that specific unit's silicon. The values are derived per-unit, not stored as fixed presets.

Frequency (MHz) and voltage (mV) are derived at runtime by the hardware-scan / autotuning routine based on chip type and the target — they vary by individual unit silicon quality. Calling profile values "presets" is wrong: two identical models tuned to the same watt target will land on different frequency/voltage points. (Frequency is tuned per chip; voltage per domain — see those entries.)

Source: POWER_PROFILES_CATALOG (frequency/voltage derived at runtime by hwscan; power-targeting)DocumentedReviewed Jun 2026

# What is the status of DCENT_OS?

Common misconception DCENT_OS is a finished, production firmware you can run today / it is MIT-licensed.

Verified DCENT_OS is D-Central's open-source (GPL-3.0) mining firmware, currently in CLOSED BETA and experimental — not production-ready. Public beta is targeted for summer 2026. It is waitlist-only (never pre-order) and carries a 0%-default, user-configurable dev fee.

DCENT_OS stands on the shoulders of the open-source mining community (CGMiner, BraiinsOS, the open ASIC ecosystem). It is GPL-3.0 — not MIT — and is offered as one more layer of decentralization, not as a finished product. Treat any "runs on X today" claim with caution unless a live image is shown.

Source: D-Central project status (dc_dcentos_status helper); FEATURE_COMPARISON_MATRIX (D-Central target column)DocumentedReviewed Jun 2026

# Is VNish open source? What is its dev fee?

Common misconception VNish is open source.

Verified VNish is proprietary (closed source), with 1.5M+ devices reportedly deployed and a 2-2.8% dev-fee range. It supports most Antminer models. It does not ship native Stratum V2.

We describe VNish in generic, non-adversarial terms and never publish VNish-specific security findings. The factual points: proprietary, wide model support, a 2-2.8% fee range, no native SV2.

Source: EXISTING_FIRMWARES; FEATURE_COMPARISON_MATRIX (VNish dev fee 2-2.8%)DocumentedReviewed Jun 2026

# What is distinctive about LuxOS?

Common misconception LuxOS is open source / supports Stratum V2.

Verified LuxOS (by Luxor) is proprietary, with a fixed 2.8% dev fee. It was the first ASIC firmware to earn SOC 2 Type 2 certification and to support 110/120 V household operation, and offers ultra-fast curtailment (to ~25 W in under 5 seconds). It does not ship native Stratum V2.

LuxOS's differentiators are operational: SOC 2 compliance for institutions, fast curtailment for grid programs, and explicit 110 V support. Crediting these is fair; claiming it does SV2 is not accurate.

Source: EXISTING_FIRMWARES (LuxOS: SOC 2, 110V, <5s curtailment); FEATURE_COMPARISON_MATRIXDocumentedReviewed Jun 2026

# What mining software does BraiinsOS+ use?

Common misconception BraiinsOS+ uses a CGMiner fork like stock.

Verified BraiinsOS+ runs BOSminer, written from scratch in Rust (async, structured as crates: a generic mining engine plus hardware-specific backends). Stock Bitmain firmware uses bmminer, a CGMiner fork. Credit CGMiner as the ancestor of the whole category.

BOSminer being a clean-room Rust rewrite (not a CGMiner fork) is a meaningful technical distinction. The binary itself is not open source even though the BCB100 board is. CGMiner remains the historical foundation that bmminer forked from.

Source: EXISTING_FIRMWARES (BOSminer = Rust, from scratch; bmminer = CGMiner fork)DocumentedReviewed Jun 2026

# What is the stock Antminer mining software?

Verified Stock Bitmain firmware runs bmminer, a fork of CGMiner, with a 0% dev fee and no custom tuning/curtailment features. It is the baseline every third-party firmware is measured against.

Stock has no dev fee but also no power-targeting autotuner, no fast curtailment and no SV2. The trade is fee-free simplicity versus the efficiency/feature gains (and small fees) of custom firmware. CGMiner is the open-source ancestor of bmminer.

Source: EXISTING_FIRMWARES; FEATURE_COMPARISON_MATRIX (Stock column)DocumentedReviewed Jun 2026

# Does custom firmware always save money?

Common misconception Custom firmware always pays for itself.

Verified Not always. Custom firmware can improve efficiency, but the dev fee (a percentage of hashrate) offsets some of the gain. Below a certain power price and at certain tuning targets, stock can win on net. The honest answer is "it depends on your power price and target."

We model this honestly rather than marketing only the upside: measured savings minus the dev-fee cost, with the pool-offset accounted for. There is a crossover point where stock is cheaper. DCENT_OS targets a 0% default fee (closed beta; public beta summer 2026).

Source: FEATURE_COMPARISON_MATRIX (dev-fee ranges); D-Central firmware TCO methodologyDocumentedReviewed Jun 2026

# What licence is DCENT_OS under?

Common misconception DCENT_OS is MIT-licensed / proprietary.

Verified DCENT_OS is licensed under GPL-3.0 — not MIT and not proprietary. The DCENT_axe open-hardware board is similarly released to the commons. Both are closed beta now, targeting public beta in summer 2026.

GPL-3.0 is a copyleft choice: improvements stay open. This is part of D-Central's decentralization narrative — contributing back to the open-mining commons it was built on, not enclosing it.

Source: D-Central project status (GPL-3.0; dc_dcentos_status helper)DocumentedReviewed Jun 2026

# How does modern autotuning actually work?

Common misconception You pick a frequency and voltage manually.

Verified Modern firmware uses power-targeting: the user sets a watt or hashrate target, and the autotuner searches for the frequency/voltage combination that hits it on that specific unit. Two identical models can land on different settings because silicon quality varies.

Power-targeting is why the same "preset name" yields different numbers per unit, and why hand-set frequency/voltage is increasingly rare. The autotuner does the search at runtime against real chip behaviour.

Source: POWER_PROFILES_CATALOG (power-targeting; runtime search)DocumentedReviewed Jun 2026

# Are WhatsMiner tuning profiles recoverable?

Verified WhatsMiner stores per-model frequency/voltage bins in plaintext UCI presets (e.g. chip_num and chip_column_num per board), which are recoverable — unlike Avalon, whose tuning tables are AES-encrypted on-device. This is an honest-scope distinction, not a uniform claim.

WhatsMiner UCI presets store chips-per-board (e.g. M20S = 105) and parallel chip rows, in plaintext. They do not store cores-per-chip (a documented gap). Avalon's equivalent is encrypted (see the Avalon entry), so a WhatsMiner-style tuning table is publishable while an Avalon one is not.

Source: MASTER_CHIP_CATALOG (WhatsMiner UCI presets plaintext; cores-per-chip = GAP)DocumentedReviewed Jun 2026

# Does DCENT_OS charge a developer fee?

Common misconception DCENT_OS charges a fixed dev fee like other custom firmware.

Verified DCENT_OS targets a 0% default developer fee, with a user-configurable field so an operator can choose to donate a percentage to D-Central. It is opt-in, not a mandatory cut. (Closed beta; public beta summer 2026; GPL-3.0.)

The 0%-default, donate-if-you-want model is deliberate: it keeps the firmware free to run while leaving room to support development. Compare the mandatory ranges of stock-vs-third-party firmware in the dev-fee entries. DCENT_OS is experimental until public beta.

Source: FEATURE_COMPARISON_MATRIX (D-Central target: 0% default, configurable); dc_dcentos_statusDocumentedReviewed Jun 2026

# Can firmware tune frequency per individual chip?

Common misconception Stock firmware tunes each chip; or no firmware can.

Verified Custom firmware (BraiinsOS+, VNish, LuxOS) can write PLL registers per chip via addressed commands — true per-chip FREQUENCY tuning. Stock runs a uniform frequency. But VOLTAGE remains per-domain on all of them (10 chips share a DC-DC). Per-chip frequency, yes; per-chip voltage, no.

This is the precise split the matrix confirms: "per-chip frequency tuning = Yes" but "per-chip voltage tuning = per-domain" on every firmware. It is the clearest single source of the per-chip-voltage myth — frequency IS per chip, which people then wrongly extend to voltage.

Source: FEATURE_COMPARISON_MATRIX (per-chip frequency = Yes; per-chip voltage = per-domain)DocumentedReviewed Jun 2026

# What does "weak chip compensation" do?

Common misconception A weak chip just lowers the whole board.

Verified Custom firmware can detect a weak chip and boost its neighbours to maintain overall board hashrate — "weak chip compensation." Stock firmware does not do this. It is one reason custom firmware can recover hashrate on aging boards.

Because frequency is tunable per chip, the autotuner can lean on healthy chips when one degrades. It is not magic — a truly failed chip still drops its domain — but it smooths the impact of marginal silicon.

Source: FEATURE_COMPARISON_MATRIX (weak chip compensation = Yes on custom)DocumentedReviewed Jun 2026

# How does firmware control miner fans?

Common misconception Fans always run on a fixed curve.

Verified Stock uses a fixed fan curve; custom firmware (BraiinsOS+/VNish/LuxOS) uses PID control with configurable Kp/Ki/Kd gains to hold target temperatures. Better fan control means quieter, cooler, longer-lived boards at a given hashrate.

PID fan control reacts to actual temperature error instead of a static lookup table, so it can run fans slower when it is safe (quieter) and ramp precisely when needed. It is a real operational benefit of custom firmware.

Source: FEATURE_COMPARISON_MATRIX (fan control: fixed curve vs PID)DocumentedReviewed Jun 2026

# How fast can a miner curtail power for the grid?

Common misconception Curtailment is slow / manual.

Verified Via API, custom firmware can drop power fast: roughly ~30 s (BraiinsOS+), ~15 s (VNish-class), and under 5 s (LuxOS, the fastest). Restore is a gradual ramp (~30-60 s) to avoid thermal shock. Stock has no API curtailment.

Fast curtailment matters for demand-response and grid programs — the miner becomes a flexible load. LuxOS's sub-5-second drop is its headline. The slow ramp-up on restore is deliberate, to protect the hardware from thermal shock.

Source: FEATURE_COMPARISON_MATRIX (curtailment speed rows); EXISTING_FIRMWARESDocumentedReviewed Jun 2026

# Where is a miner's real power measured?

Common misconception All firmware measures power the same way.

Verified Stock and BraiinsOS+ report PSU-level power; VNish and LuxOS read board-level power via the APW12's I2C ADC (per output rail). Board-level metering is more accurate for true draw and per-board efficiency.

PSU-level numbers include conversion losses and are coarser; board-level metering (reading the APW12 I2C ADC) tells you what the boards actually consume. This is why "measured" power can differ from a firmware's reported number depending on where it samples.

Source: FEATURE_COMPARISON_MATRIX (power metering: PSU-level vs board-level via APW12 I2C ADC)DocumentedReviewed Jun 2026

# What can you optimize a miner for?

Common misconception You can only set a hashrate.

Verified Autotuners can target different goals: maximum hashrate, a watt budget (power target), or best efficiency (J/TH). BraiinsOS+ defaults toward efficiency, LuxOS toward a power target; the target is configurable. Stock has no autotuner.

Choosing the target is the operator's lever: efficiency for cheap-power-but-margin-tight, hashrate for max output, power-target for grid/breaker limits. The firmware then finds the per-chip frequency / per-domain voltage to hit it at runtime.

Source: FEATURE_COMPARISON_MATRIX (Auto-Tuning Algorithm: tune target row)DocumentedReviewed Jun 2026

# Why does a miner ramp power up gradually?

Common misconception Miners go to full power instantly.

Verified Custom firmware ramps voltage domains up one by one to avoid inrush current; stock applies power more abruptly. Gradual ramp protects the PSU and reduces stress on cold start.

Bringing 12-38 domains live simultaneously would spike current; sequencing them limits inrush. It is a small reliability detail that the matrix records as "power ramp-up sequence: gradual" on custom firmware.

Source: FEATURE_COMPARISON_MATRIX (power ramp-up sequence: instant vs gradual)DocumentedReviewed Jun 2026

# Can firmware monitor individual cores inside a chip?

Common misconception Monitoring stops at the chip level.

Verified Some firmware reads a core_id in the nonce response, enabling per-CORE hashrate tracking (not just per-chip). This is the finest-grained health view available and helps spot a partially-degraded chip before it fails outright.

A chip has many cores; a nonce that carries its core_id lets the firmware build a per-core map. Most firmware tops out at per-chip; per-core is the most detailed tier, useful for early degradation detection.

Source: FEATURE_COMPARISON_MATRIX (core-level monitoring; nonce core_id)DocumentedReviewed Jun 2026

# Can a miner respond to electricity price automatically?

Common misconception Miners run flat regardless of price.

Verified With dynamic power scaling, firmware can adjust mining intensity from external signals (grid, price feed, temperature) — LuxOS exposes this via API, and the target DCENT_OS design accepts a price feed to auto-adjust. Stock cannot.

This turns a miner into a price-responsive load: throttle when power is expensive, ramp when it is cheap or abundant. It is the basis of demand-response participation and of mining stranded/curtailed energy.

Source: FEATURE_COMPARISON_MATRIX (dynamic power scaling; electricity-price-aware rows)DocumentedReviewed Jun 2026

# What does the Antminer APW3 PSU output?

Common misconception The APW3 is a fixed 12 V supply.

Verified The APW3 / APW3++ outputs 11.6-13.0 V DC at up to 133 A (1600 W @220 V, 1200 W @110 V), ~93% efficient. It powers the S7/S9 family. It is not a fixed-12 V brick — it has a usable voltage band.

Knowing the APW3 band matters for repair and for running S9s at reduced power. Note the 110 V derate to 1200 W — running an S9 on 120 V household power limits available wattage.

Source: PSU_PROTOCOL_BIBLE (PSU compatibility table)DocumentedReviewed Jun 2026

# How is the S19-era APW12 PSU voltage controlled?

Common misconception The APW12 voltage is fixed / set by a dial.

Verified The APW12 is digitally controlled over I2C by an on-board PIC16F1704, via a 4-pin J15 interface. The control board commands the output voltage; OUT2 is a fixed 12 V / 15 A rail for the control board and fans.

The APW12 (1215 series, 12-15 V, 233 A, 3600 W @220 V) is a dual-output digital PSU. Later sub-revisions (d/e/f/g) added a voltage feedback loop and EMC fixes. The I2C control is what lets firmware set domain voltage targets.

Source: PSU_PROTOCOL_BIBLE (APW12 dual-output architecture; I2C via PIC16F1704 on J15)DocumentedReviewed Jun 2026

# Which PSU powers the S17 generation?

Verified The APW9 (14.5-21 V, 170 A, 3600 W @220 V) powers the S17/S17 Pro/T17; the APW9+ (200 A) powers the S17+/S17e/T17+/T17e. The S17 generation runs a higher voltage band than the S9-era APW3.

Matching PSU to generation matters: an APW3 cannot run an S17, and the S17 boards expect the APW9 voltage band. The "+" PSU variant exists for the higher-draw Plus/e models.

Source: PSU_PROTOCOL_BIBLE (PSU compatibility table)DocumentedReviewed Jun 2026

# Why do Antminers list 220-277 V and lose power on 120 V?

Common misconception Antminers run at full power on any household outlet.

Verified Most Antminer PSUs are rated for 200-240 V and derate hard on 110/120 V (the APW3 drops from 1600 W to 1200 W, for example). Many modern units simply will not reach full hashrate on a standard North American 120 V circuit.

This is exactly why home miners look at 120 V-friendly options and at the single-chip Bitaxe, which runs from a small USB-C / DC supply. For full-size ASICs at home, 240 V (a dryer-style circuit, within the NEC/CEC 80% rule) is usually required.

Source: PSU_PROTOCOL_BIBLE (input-voltage / wattage derate columns)DocumentedReviewed Jun 2026

# What power does a Bitaxe need?

Common misconception A Bitaxe needs a big ASIC power supply.

Verified A single-chip Bitaxe runs from a small DC/USB-C supply — on the order of ~15-25 W for a Gamma — not a 3000 W+ ASIC PSU. That low power and standard outlet are the whole appeal for home/desk use.

Because it is one chip on an ESP32-S3 board, a Bitaxe sips power and runs on any household outlet quietly. This is the honest pivot for North-American home miners hitting the 120 V wall with full-size ASICs: the Bitaxe is exactly what fits a normal home circuit.

Source: POWER_PROFILES_CATALOG (single-chip wall watts); ESP-Miner board defsDocumentedReviewed Jun 2026

# How big a breaker does a full-size ASIC need?

Common misconception Plug it into any outlet that fits.

Verified Continuous loads must use no more than 80% of a circuit's rating (NEC/CEC 80% rule). A ~3000-3500 W ASIC on 240 V needs a properly sized dedicated circuit (commonly 20 A+), and most full-size ASICs derate or won't reach full hashrate on a shared 120 V household circuit.

The 80% continuous-load rule is the safety basis: a 20 A circuit is good for ~16 A continuous. Run full-size ASICs on a dedicated, correctly sized 240 V circuit (dryer-style), not a shared 120 V outlet. This is exactly the gap the low-power Bitaxe sidesteps.

Source: D-Central North America Power Guide (NEC/CEC 80% rule); PSU_PROTOCOL_BIBLEDocumentedReviewed Jun 2026

# What are the core Stratum V1 messages?

Verified Stratum V1 is a JSON-RPC protocol: the miner sends mining.subscribe (gets extranonce1 + extranonce2_size) and mining.authorize; the pool sends mining.set_difficulty and mining.notify (jobs); the miner sends mining.submit (shares).

V1 is plaintext JSON over TCP. It is what almost every miner and pool speaks today. Stratum V2 (binary, encrypted, with job declaration) is the successor authored by Braiins — credited and currently native only on BraiinsOS+.

Source: STRATUM_PROTOCOL_BIBLE (V1 message flow)DocumentedReviewed Jun 2026

# What does Stratum V2 add over V1?

Common misconception Stratum V2 is just a faster version of V1.

Verified Stratum V2 is a binary, encrypted (Noise-protocol) protocol that adds job declaration — letting miners construct their own block templates — plus reduced bandwidth and better security. It was authored by Braiins (spec co-authored with Bitmain). Credit Braiins.

The headline feature is job declaration: it moves template construction toward the miner, improving decentralization. Encryption hardens against hashrate hijacking. As of this review, native SV2 ships only on BraiinsOS+ among third-party Antminer firmwares.

Source: STRATUM_PROTOCOL_BIBLE; FEATURE_COMPARISON_MATRIX (SV2 = native on BraiinsOS+ only)DocumentedReviewed Jun 2026

# What is "version rolling" / overt ASICBoost?

Common misconception ASICBoost is a hidden exploit.

Verified Version rolling (BIP 310) is overt ASICBoost: the miner is allowed to roll bits of the block-header version field (mask 0x1fffe000) to gain efficiency. It is negotiated openly in Stratum via the version-rolling extension — a standard, sanctioned optimization.

Overt ASICBoost via BIP 310 is the legitimate, transparent form — negotiated with the pool through mining.configure. It is not the covert variant that drew controversy years ago. Modern firmware and pools support it openly.

Source: STRATUM_PROTOCOL_BIBLE (Version Rolling / BIP 310 / ASICBoost)DocumentedReviewed Jun 2026

# Does a Bitaxe "mine Bitcoin" steadily?

Common misconception A Bitaxe earns a steady trickle of Bitcoin.

Verified A solo Bitaxe does not earn steadily — it either finds a whole block (the full subsidy + fees) or finds nothing. At ~1.2 TH/s (Gamma) against the current network, the expected time to solo a block is on the order of thousands of years; it is a lottery ticket, run honestly as such.

We frame solo Bitaxe odds honestly: the value is sovereignty, learning, heat and the non-zero lottery chance, not steady yield. Pooled mining smooths payouts but concedes template control. This honesty is deliberate — context-free "negative ROI" takes miss the point, and false "steady earnings" claims are worse.

Source: STRATUM_PROTOCOL_BIBLE (solo vs pool); D-Central solo-odds methodologyDocumentedReviewed Jun 2026

# How big is the nonce search space on a Bitcoin header?

Common misconception The 32-bit nonce is the whole search space.

Verified The header nonce is 32 bits (2^32 ~ 4.3 billion values). Combined with the extranonce (e.g. a 16-bit space), the effective per-job space is far larger (e.g. 2^48). Modern ASICs exhaust 2^32 almost instantly, which is why pools hand out fresh work via extranonce + version rolling.

A modern ASIC blows through 2^32 nonces in a fraction of a second, so the real search depth comes from extranonce rotation and (optionally) version rolling. This is why the pool keeps sending mining.notify jobs and set_extranonce updates.

Source: STRATUM_PROTOCOL_BIBLE (nonce + extranonce search space 2^48)DocumentedReviewed Jun 2026

# Is a "share" the same as finding a block?

Common misconception Every share is a partial Bitcoin payment.

Verified No. A share is a proof of work that meets the POOL's (lower) difficulty target, used to measure your contribution. A block requires meeting the much higher NETWORK target. You submit many shares; only one in a vast number is also a valid block.

Pool difficulty exists so miners submit shares at a sane rate for accounting. Pool difficulty-1 and Bitcoin difficulty-1 use different target precisions (pdiff vs bdiff). A solo miner like a Bitaxe still submits shares to a solo pool, but only a network-valid solution pays the block.

Source: STRATUM_PROTOCOL_BIBLE (difficulty/target mechanics; pdiff vs bdiff)DocumentedReviewed Jun 2026

# Why does my miner's "difficulty" keep changing?

Common misconception The network difficulty is changing in real time.

Verified That is POOL difficulty (vardiff), not network difficulty. The pool sends mining.set_difficulty to keep your share rate reasonable as your hashrate varies. Network difficulty only retargets every 2016 blocks (~2 weeks).

Vardiff is a pool comfort setting; it does not change your odds of a block, only how often you report shares. Confusing pool difficulty with network difficulty is common when reading miner logs.

Source: STRATUM_PROTOCOL_BIBLE (mining.set_difficulty; vardiff)DocumentedReviewed Jun 2026

# What does a Bitaxe win if it finds a block?

Common misconception A Bitaxe win pays a fraction of a block.

Verified A solo win pays the FULL block reward: the current block subsidy plus all transaction fees in that block. The subsidy halves roughly every four years (the "halving"). A solo miner takes the whole reward or nothing — there is no partial block.

This all-or-nothing payoff is the lottery framing. The subsidy steps down at each halving, so the prize shrinks over time while difficulty generally rises — which is why we present solo odds honestly rather than as expected income.

Source: STRATUM_PROTOCOL_BIBLE (block reward = subsidy + fees); Bitcoin consensus rulesDocumentedReviewed Jun 2026

# How often does Bitcoin network difficulty change?

Common misconception Difficulty changes every block / daily.

Verified Network difficulty retargets every 2016 blocks — about every two weeks — to keep the average block time near 10 minutes. It is not a per-block or daily change. (Pool/vardiff is separate and changes often.)

The 2016-block epoch is a Bitcoin consensus rule. Rising difficulty (more network hashrate) lowers each miner's share of blocks over time, which is why profitability and solo odds drift even at constant Bitcoin price.

Source: STRATUM_PROTOCOL_BIBLE (difficulty mechanics); Bitcoin consensus (2016-block retarget)DocumentedReviewed Jun 2026

# Why mine in a pool instead of solo?

Common misconception Pools are required to mine.

Verified Pools smooth income: many miners combine hashrate and split the reward by contributed shares, so you get frequent small payouts instead of a rare lottery jackpot. Solo (e.g. a Bitaxe on a solo pool) keeps the full reward but only on the rare block you find. Neither is "required."

The trade is variance vs control: pools reduce variance but historically concentrated template construction (Stratum V2 job declaration pushes that back toward miners). Solo maximizes sovereignty and the full-reward upside at the cost of payout frequency.

Source: STRATUM_PROTOCOL_BIBLE (pool vs solo); Stratum V2 job declarationDocumentedReviewed Jun 2026

# How does Stratum V2 help decentralization?

Common misconception Stratum V2 is only about speed/security.

Verified Through job declaration: SV2 lets the miner (not just the pool) construct the block template, choosing which transactions to include. That moves template-building power back toward individual miners — a decentralization gain on top of its bandwidth and encryption benefits. Credit Braiins.

Under Stratum V1 the pool decides the template; under SV2 with job declaration the miner can. Spreading template construction across many miners reduces the influence of a few large pools over which transactions get mined.

Source: STRATUM_PROTOCOL_BIBLE (SV2 job declaration); FEATURE_COMPARISON_MATRIXDocumentedReviewed Jun 2026

# What is the stock hashrate of a typical Antminer S19 (non-Pro)?

Common misconception The S19 does ~56 TH/s.

Verified A typical Antminer S19 runs ~95 TH/s at ~3250 W stock (about 34 J/TH). The "S19 family" headline figure is ~95 TH/s, not ~56 TH/s; ~56 TH/s is far below any stock S19 point.

The S19 power-profile band runs roughly 67 TH/s @ 1630 W (24.3 J/TH) underclocked up to ~130 TH/s @ 4700 W overclocked, with stock around 95 TH/s @ 3250 W. Quoting ~56 TH/s for an S19 is a real error that has appeared in published comparisons.

Source: POWER_PROFILES_CATALOG (S19 profiles: stock ~95 TH @ 3250W)DocumentedReviewed Jun 2026

# How many hash boards does an Antminer have?

Common misconception It varies wildly / one board.

Verified A standard Antminer has THREE hash boards (Chain0, Chain1, Chain2), each connected to the control board over an 18-pin ribbon cable.

Three chains is the standard Antminer topology. The 18-pin interface carries power (3.3 V), ground, CLK, TX/CI, RX/RO, RST and I2C. When a miner reports "2 of 3 boards" it has lost a chain — a board-level fault, not a chip-level one.

Source: HASHBOARD_DIAGNOSTICS; bible-facts.md (hash-board interface)DocumentedReviewed Jun 2026

# How far can an S19 be tuned?

Common misconception An S19 only runs at its rated hashrate.

Verified A 126-TH-class S19 has roughly 14 usable power points, from ~67 TH @ 1630 W (24.3 J/TH, underclocked) up to ~130 TH @ 4700 W (36.2 J/TH, overclocked), with stock around 95 TH @ 3250 W. Underclocking can improve efficiency by ~29%.

The big lever is underclocking for efficiency: trading hashrate for J/TH. The ~29% efficiency gain to 24.3 J/TH is the underclock sweet spot. Every one of these points is calculated at runtime for the specific unit, not a stored preset.

Source: POWER_PROFILES_CATALOG (S19 profile band; runtime-derived)DocumentedReviewed Jun 2026

# What does J/TH mean and why does it matter?

Common misconception J/TH is just a marketing number.

Verified J/TH (joules per terahash) is efficiency: the energy used to compute one terahash. Lower is better. It is the single most important spec for profitability, because power is the dominant ongoing cost. ~15 J/TH (BM1370) vs ~98 J/TH (S9) is a ~6.5x efficiency gap.

At a fixed power price, J/TH directly sets your cost per unit of hashrate, which sets break-even. A miner with half the J/TH earns the same hashrate for half the power. It is why old S9s are heaters and new S21 Pros are economic.

Source: bible-facts.md (efficiency column); MINING_ECOSYSTEM (economics)DocumentedReviewed Jun 2026

# What is hashprice?

Common misconception Hashprice is the price of a miner.

Verified Hashprice is the expected daily revenue per unit of hashrate (e.g. $/TH/day or $/PH/day) at current price, difficulty and fees. It is the daily "what is my hashrate worth" number — not the price of hardware. Term popularized by Luxor.

Hashprice moves with Bitcoin price, network difficulty and fee levels. Multiply it by your hashrate to estimate gross revenue, then subtract power and fees. D-Central tracks a CAD-native view; the concept and the index name are credited to Luxor.

Source: MINING_ECOSYSTEM; Luxor (hashprice term)DocumentedReviewed Jun 2026

# Is the electricity a miner uses "wasted" if you heat with it?

Common misconception Mining always wastes the electricity as heat.

Verified A miner converts ~100% of its electrical input into heat (like any resistive heater). If you would have run electric heat anyway, the heat is not wasted — the mining revenue effectively offsets the heating cost. This is the basis of Bitcoin space-heating.

During heating season, a miner displacing an electric heater does useful work twice: it heats the room AND earns hashprice. The honest caveat is a heat pump's COP — a heat pump can deliver more heat per watt, so the offset math depends on what you are displacing and your climate.

Source: HASHBOARD_DIAGNOSTICS (thermal); POWER_PROFILES_CATALOG (heat output); MINING_ECOSYSTEMDocumentedReviewed Jun 2026

# Does a miner draw exactly its rated wattage?

Common misconception A miner draws exactly its nameplate power.

Verified No. Real draw varies by roughly +/-3% to +/-5% around the nameplate figure, unit to unit and with temperature. Over a month at scale this is a real dollar difference, which is why bench-measured power matters more than the label.

Nameplate is a typical value, not a guarantee. Silicon binning, ambient temperature and PSU efficiency all move the real draw. For break-even math, use measured power where you can — the band is a footnote OEMs rarely quantify.

Source: POWER_PROFILES_CATALOG; PSU_PROTOCOL_BIBLE (efficiency); D-Central bench notesDocumentedReviewed Jun 2026

# What is the Avalon Nano / Mini home line?

Verified Canaan's Avalon home miners (Nano 3/3S, Mini 3) target home/quiet use on 110-240 V. The Mini 3, for example, is positioned around ~37.5 TH/s / ~800 W. They compete with the Bitaxe and Avalon Nano as low-power home options, but are closed-source.

These are Canaan's answer to the home-mining trend. They are quieter and lower-power than data-centre ASICs, but closed firmware — unlike the open-source Bitaxe. D-Central documents both and sells across the home segment.

Source: MINING_ECOSYSTEM (Avalon Mini 3 ~37.5 TH/s, 800W, 110-240V); MASTER_CHIP_CATALOGDocumentedReviewed Jun 2026

# Why are data-centre ASICs too loud for a home?

Common misconception You can run any ASIC quietly at home.

Verified Full-size ASICs (S19/S21 class) use high-RPM fans and run at 70-80+ dB — jet-engine class — because they must move a lot of heat. That is why home miners either build sound enclosures / immersion, or choose quiet low-power options like the Bitaxe or the Avalon home line.

The noise is a function of cooling a 3+ kW heat load with air. You can quiet a big ASIC (immersion, hydro, ducting, sound boxes) but it is real work. A single-chip Bitaxe is near-silent by comparison. Honest expectation-setting beats a surprised buyer.

Source: HASHBOARD_DIAGNOSTICS (thermal/cooling); MINING_ECOSYSTEM (home segment)DocumentedReviewed Jun 2026

# Is a refurbished ASIC a worse buy than new?

Common misconception Refurbished always means unreliable.

Verified Not necessarily. A properly refurbished ASIC is bench-tested (chip-count/pattern test, per-domain voltage, thermal cycle, burn-in) before it ships, and a tested unit at a lower $/TH can beat new on payback — provided the testing is real and the warranty is clear.

The risk in used gear is untested condition, not "refurbished" as a word. The honest signal is what was actually tested and what warranty backs it. D-Central's refurb units carry a documented bench checklist and D-Central's own warranty (new units carry the manufacturer's).

Source: D-Central "What We Test" bench checklist; refurb policyDocumentedReviewed Jun 2026

# What do TH/s, PH/s and EH/s mean?

Verified Hashrate units scale by 1000: 1 PH/s (petahash) = 1,000 TH/s (terahash); 1 EH/s (exahash) = 1,000 PH/s. A Bitaxe Gamma is ~1.2 TH/s; an S21 is ~200 TH/s; the whole network is hundreds of EH/s.

A single Gamma at ~1.2 TH/s against a network of hundreds of EH/s is why solo mining is a lottery: your share of total hashrate is your share of the chance per block. The units are just powers of 1000 of hashes per second.

Source: STRATUM_PROTOCOL_BIBLE / MINING_ECOSYSTEM (hashrate scale); bible-facts.mdDocumentedReviewed Jun 2026

# What determines if a miner is profitable?

Common misconception A miner is profitable if it earns any Bitcoin.

Verified Profitability is hashprice x your hashrate, minus power cost (your $/kWh x watts) and pool/dev fees. The break-even power price is the $/kWh where revenue equals power cost; below it you profit, above it you do not. Efficiency (J/TH) sets that threshold.

A more efficient miner has a higher break-even power price — it tolerates more expensive electricity. This is why J/TH dominates the buying decision and why old S9s only work on near-free power. The Quebec advantage is cheap hydro power.

Source: MINING_ECOSYSTEM (economics); bible-facts.md (J/TH); D-Central profitability methodologyDocumentedReviewed Jun 2026

# Is there one "cost to mine a Bitcoin"?

Common misconception There is a single global cost to mine one Bitcoin.

Verified No — it depends on your power price, hardware efficiency and the network difficulty at the time. A global average is meaningless for a decision; the number that matters is YOUR cost, set mostly by your $/kWh and your miners' J/TH.

Headline "it costs $X to mine a Bitcoin" figures bake in assumptions that may not be yours. Compute it from your own power price and fleet efficiency against current difficulty. We provide a worked CAD model rather than a single context-free number.

Source: D-Central cost-to-mine model; MINING_ECOSYSTEMDocumentedReviewed Jun 2026

# Can you still profit with an Antminer S9?

Common misconception The S9 is profitable anywhere / the S9 is useless.

Verified At ~98 J/TH the S9 is only economic with very cheap or free power, or when used primarily as a heater (where the heat offsets electric heating). Under typical grid prices it loses money on power alone — but as a learning device or seasonal heater it still has a role.

The S9 is the textbook case for the heat-offset and cheap-power arguments. We neither overhype it ("still profitable!") nor dismiss it ("e-waste") — its value is honest and conditional: heat, learning, or near-free power.

Source: bible-facts.md (S9 ~98 J/TH); MINING_ECOSYSTEM (economics); heat-offsetDocumentedReviewed Jun 2026

# Why do "Hydro" miners hashrate higher?

Common misconception Hydro miners use a different, faster chip.

Verified Hydro models use the SAME chip generation as their air-cooled siblings (e.g. S21 Hydro = BM1368) but water-cooling removes heat better, allowing a higher sustained clock and thus more hashrate. It is cooling, not a different chip.

Better heat removal raises the safe tuning ceiling, so a Hydro unit can hold a higher frequency than the air-cooled version of the same chip. The trade is the water-cooling infrastructure it requires.

Source: bible-facts.md (chip tables: S21 Hydro = BM1368); POWER_PROFILES_CATALOG (hydro)DocumentedReviewed Jun 2026

# What does "chain X find 0 ASIC" usually mean?

Common misconception It always means the whole board is dead.

Verified It means the control board enumerated zero chips on that chain. Common causes: a failed PIC (on PIC-era boards), a dead domain dragging the chain down, a bad ribbon/connector, or a power/clock fault — not necessarily a scrap board. Diagnosis starts at the domain and the 18-pin interface.

A "0 ASIC" chain is a board-level fault to investigate, not an automatic write-off. Many are repairable at the domain or connector level. On S21 boards there is no PIC to suspect (see the S21-no-PIC entry).

Source: HASHBOARD_DIAGNOSTICS (chip-detection faults; PIC/EEPROM)DocumentedReviewed Jun 2026

# My miner shows 2 of 3 boards — is it broken?

Common misconception A miner with 2 working boards is fine / is scrap.

Verified It has lost one hash board (one chain). The miner will run at ~2/3 hashrate. It is a board-level fault — often repairable — not a controller failure and not a total loss. Identify which chain (0/1/2) and inspect that board and its ribbon.

Losing a chain is one of the most common ASIC faults. The miner keeps hashing on the remaining boards. Whether to repair depends on the fault and the board's value — sometimes a domain or connector fix restores it.

Source: HASHBOARD_DIAGNOSTICS (3 chains; board-level faults)DocumentedReviewed Jun 2026

# Why is my miner detected but hashing low?

Common misconception Low hashrate always means a dead chip.

Verified Chips detected but a low nonce/hashrate often means degraded transistors (aged silicon), thermal throttling, or a tuning/voltage problem — not necessarily a missing chip. The diagnostic is nonce count per chip plus temperatures.

Degradation is gradual: a chip can enumerate yet under-perform. Before scrapping, check temperatures, cooling and the per-chip nonce distribution; sometimes re-tuning or cooling fixes it. This is distinct from a hard "0 chips" fault.

Source: HASHBOARD_DIAGNOSTICS (low nonce rate -> degraded transistors)DocumentedReviewed Jun 2026

# Why are used S17s considered risky?

Common misconception Used S17s are as reliable as any other generation.

Verified The S17/T17 generation was notorious for thermal-related failures, so "tested working" used S17-era boards warrant a full bench check before purchase. The BM1397 chip itself is sound and well-documented; the generation's field reliability is the concern.

We state this from public/general knowledge of the generation, not from any competitor-specific data: the S17 era had elevated thermal failure. Buy used S17 gear only with a proper inspection. This is general protective guidance, not a manufacturer claim.

Source: HASHBOARD_DIAGNOSTICS; general S17-generation field recordDocumentedReviewed Jun 2026

# Does immersion cooling let you push more hashrate?

Common misconception Immersion is just for noise.

Verified Immersion (dielectric fluid) and hydro cooling remove heat far better than air, which allows higher overclocks and can extend component life by holding stable temperatures — but they add coolant, pump and leak-management considerations. Hydro models are a distinct product line (e.g. S19/S21 Hydro).

Better thermal headroom means a higher safe tuning band, plus quieter operation. The trade is plumbing: coolant spec, flow/temperature envelopes, leak monitoring and (in cold climates) winterization. It is an operational commitment, not a plug-and-play upgrade.

Source: POWER_PROFILES_CATALOG (hydro/immersion profiles); HASHBOARD_DIAGNOSTICS (thermal)DocumentedReviewed Jun 2026

# What happens when a miner loses a fan?

Common misconception A fan fault is harmless.

Verified Most Antminers refuse to mine (or throttle/shut down) if a fan stops, as a thermal-protection measure — you will see a fan-related error rather than silent overheating. The fix is the fan/connector, not a bypass; bypassing fan checks risks cooking the boards.

The firmware reads fan tachometers; a missing or stalled fan trips protection. Replacing the fan (or fixing its header) is the correct repair. "Tricking" the fan check to keep mining is how boards die.

Source: HASHBOARD_DIAGNOSTICS (fan / thermal protection faults)DocumentedReviewed Jun 2026

# Why does a miner report a temperature-sensor error?

Common misconception A temp error means the chip is fine.

Verified The temperature sensor and EEPROM share the hash board's I2C bus (18-pin pins 4/5). A temp-sensor read failure can mean a bad sensor, a bad I2C connection, or a board fault — and the miner will protect itself rather than risk running blind on temperature.

Because the firmware will not run a board it cannot thermally monitor, an I2C/temp-sensor fault stops hashing on that board. Diagnose the I2C bus and the sensor before assuming chip death.

Source: HASHBOARD_DIAGNOSTICS (I2C temp sensor / EEPROM on 18-pin pins 4-5)DocumentedReviewed Jun 2026

# Is it always worth repairing an ASIC?

Common misconception Every dead miner is worth repairing.

Verified No — and an honest repair shop will sometimes tell you NOT to repair. If the repair cost approaches the unit's market value, or the chip generation is too inefficient to be economic, replacement (or repurposing as a heater) is the better call.

The repair-vs-replace decision is economics: repair cost + remaining useful life + the unit's J/TH versus current hardware. We publish flat-rate repair tiers and a "when not to repair" position precisely so the math is transparent.

Source: D-Central ASIC Repair Pricing ("when we'll tell you NOT to repair"); HASHBOARD_DIAGNOSTICSDocumentedReviewed Jun 2026

# Does D-Central publish exact ASIC failure-rate percentages?

Common misconception D-Central publishes precise failure-rate statistics.

Verified No. We do not publish exact internal repair-ticket failure rates or success-rate percentages as hard public statistics. Reliability framing is qualitative and public-source-based unless a verified dataset is explicitly cited. This is a deliberate honesty guardrail.

Claiming precise internal failure percentages without a published, methodologically-sound dataset would be the kind of unverifiable claim this canon exists to avoid. Where we do publish reliability data, it carries an explicit provenance and methodology note.

Source: D-Central data-provenance policy (RDR gate); llms.txt guardrailDocumentedReviewed Jun 2026

# How do you recover a bricked Antminer control board?

Common misconception A bricked control board is dead.

Verified Many Zynq/Amlogic Antminers can be recovered by booting a recovery image from an SD card, which can reflash the NAND — a bricked controller is often recoverable, not scrap. The exact method depends on the control-board platform (Zynq vs Amlogic vs BeagleBone).

SD-card recovery bypasses a corrupted NAND boot and rewrites it. It is platform-specific: a Zynq recovery image will not boot an Amlogic board. Bitaxe/ESP32 boards instead recover via the USB web-flasher (/flash/), which is a different mechanism.

Source: ANTMINER_ARCHITECTURE (SD recovery / NAND reflash); platform notesDocumentedReviewed Jun 2026

# My board reads 0 chips after I raised the frequency — why?

Common misconception Higher frequency is always safe.

Verified Pushing frequency too high can cause "chip reads 0 after frequency increased" or a hashrate drop: the chips fail to keep up at that clock/voltage, especially as they heat. Back off the target; the autotuner exists precisely to find the stable point per unit.

Over-clocking past the silicon's stable envelope makes chips drop out — they cannot lock the PLL or compute reliably at that frequency/temperature. This is why hand-overclocking is risky versus letting the autotuner search a safe band at runtime.

Source: HASHBOARD_DIAGNOSTICS ("Chip reads 0 after frequency is increased")DocumentedReviewed Jun 2026

# Who created the Bitaxe?

Verified The Bitaxe was created by skot9000 and is maintained by the Open Source Miners United (OSMU) community. The Nerd family (NerdAxe, NerdQAxe+/++, NerdOctaxe) is credited to its own designers (BitMaker-hub, shufps, pmaxuw, Patsch91). D-Central sells and documents these; it did not design them.

Accurate attribution matters: the open-source Bitaxe ecosystem exists because of skot9000, OSMU and the individual board designers. D-Central's role is seller, repairer and documenter — and contributor of DCENT_axe / DCENT_OS back to the commons.

Source: bitaxe.org / OSMU; ESP-Miner contributorsDocumentedReviewed Jun 2026

# Where does the term "hashprice" come from?

Verified "Hashprice" — the expected revenue per unit of hashrate per day — is a term popularized by Luxor. D-Central uses it (with a Canadian-dollar cut) and credits Luxor for the metric.

Crediting the origin of a widely-used metric is part of how this canon stays honest. Hashprice is the daily revenue a miner expects per TH/s (or PH/s); Luxor popularized the term and runs the best-known index. D-Central's contribution is a CAD-native view wired to purchasable hardware, not the invention of the concept.

Source: MINING_ECOSYSTEM; Luxor (term origin)DocumentedReviewed Jun 2026

# What is the open-source ancestor of mining firmware?

Verified CGMiner is the open-source mining software that most modern ASIC firmware descends from: stock bmminer is a CGMiner fork, and the broader ecosystem stands on it. Crediting CGMiner is part of the shoulders-of-giants lineage.

Before the BraiinsOS / VNish / LuxOS era, CGMiner (and BFGMiner) defined the category. bmminer forked CGMiner; BOSminer rewrote the idea in Rust. The open lineage is why an open firmware like DCENT_OS is a continuation, not an invention.

Source: EXISTING_FIRMWARES (bmminer = CGMiner fork); shoulders-of-giants policyDocumentedReviewed Jun 2026

# Who makes the NerdQAxe / NerdOctaxe family?

Common misconception The Nerd family is made by Bitaxe / D-Central.

Verified The Nerd family (NerdAxe, NerdQAxe+/++, NerdOctaxe, NerdMiner) is the work of its own open-source designers (e.g. BitMaker-hub, shufps, pmaxuw, Patsch91), built in the same OSMU ecosystem as the Bitaxe but by different people. D-Central sells and documents them; it did not design them.

Accurate attribution: the Nerd boards are multi-chip open-source miners from independent designers, not Bitaxe-org or D-Central products. They chain 2-8 Bitmain chips for more hashrate than a single-chip Bitaxe.

Source: ESP-Miner / OSMU contributors; bitaxe.orgDocumentedReviewed Jun 2026

# What firmware runs on a Bitaxe?

Common misconception A Bitaxe runs Antminer firmware.

Verified A Bitaxe runs AxeOS (the ESP-Miner firmware) on its ESP32-S3 microcontroller — open-source firmware from the OSMU community, unrelated to Antminer firmware. It exposes a web UI and a documented API/BAP for configuration.

AxeOS is purpose-built for the single-chip ESP32-S3 boards. It is open source (credit OSMU). D-Central's DCENT_axe work and the /flash/ web flasher build on this open base; you flash AxeOS-class firmware, not Antminer firmware, onto a Bitaxe.

Source: ESP-Miner (AxeOS) source; OSMUDocumentedReviewed Jun 2026

# What is the Bitaxe GT / Hex?

Common misconception The Bitaxe GT and Hex are single-chip like the Gamma.

Verified The Bitaxe Hex chains 6 chips and the GT is a higher-hashrate multi-chip board — both go beyond the single-chip Gamma/Supra/Ultra. They are open-source community designs for more solo hashrate, still credited to the OSMU ecosystem.

If a single-chip Bitaxe is the entry point, the Hex/GT and the NerdQAxe/NerdOctaxe family are the "more chips, more hashrate" tier — same chips, more of them. D-Central stocks across the range; the canonical single-chip Bitaxe is still where most people start.

Source: ESP-Miner / OSMU board defs; D-Central Bitaxe catalogueDocumentedReviewed Jun 2026

# What is the DCENT_axe?

Common misconception The DCENT_axe is a finished competitor product / claims to be first.

Verified DCENT_axe is D-Central's open-hardware (GPL-3.0) Bitaxe-lineage board, built on the open-source work of skot9000 and the OSMU community. It is experimental / closed beta, targeting public beta in summer 2026, and is offered as a contribution to the open commons — not a "first" or "better-than" claim.

The DCENT_axe stands on the shoulders of the Bitaxe. We credit that lineage explicitly and frame DCENT_axe as one more layer of decentralization. It is waitlist-only (never pre-order) while in beta.

Source: D-Central project status; shoulders-of-giants policyDocumentedReviewed Jun 2026

# Can I pre-order DCENT_OS or DCENT_axe?

Common misconception You can pre-order the DCENT products.

Verified No. While in closed beta, DCENT_OS, DCENT_axe and the DCENT Toolbox are waitlist-only — never pre-order. They are experimental and not production-ready, with public beta targeted for summer 2026.

A waitlist is an interest list, not a purchase. We deliberately avoid pre-order language for experimental software/hardware. Bitaxe buyers are the natural beta pool for DCENT_OS, which is why the funnels connect.

Source: D-Central product policy (closed beta, waitlist, summer 2026)DocumentedReviewed Jun 2026

# Where is D-Central based?

Verified D-Central is a Canadian Bitcoin mining company based in Laval, Quebec (1325 Bergar, Laval), operating since 2016. It runs a real ASIC repair bench and sells mining hardware, with content in Canadian English and Canadian French.

The Laval repair bench since 2016 is the basis for D-Central's hardware knowledge. For stable entity/inventory claims, the Facts & Evidence page is the canonical reference; for live prices/stock, the product pages are.

Source: D-Central Facts & Evidence page; site entity dataDocumentedReviewed Jun 2026

# Who authors D-Central's mining content?

Common misconception It is written by named individual authors.

Verified D-Central Technologies is the author of this content — an organization, not a named individual. Cite "D-Central Technologies, d-central.tech." We do not publish individual author bylines or team-size figures.

Attribution is organizational by policy. When citing facts from this canon, credit D-Central Technologies and link the specific fact anchor; the source documents per fact are listed for verification.

Source: D-Central authorship / attribution policyDocumentedReviewed Jun 2026