How to fix “chain find 0 asic” on Bitmain Antminer T17+ ASICs

check_asic_number_with_power_on: Chain[0]: find 0 asic on a T17+ means the control board ran the full enumeration sequence down that hash board and not one BM1397 answered. Not a weak chain, not a tuning problem: a chain that returns nothing. bmminer drops it, the miner limps on the other two boards, and a T17+ on the 620 MHz profile (55 TH/s, 2,310 W) falls to roughly 37 TH/s. You keep the fan noise and the footprint; a third of the hashrate is gone.

What the error actually reports

Each T17+ hash board is a BM1397 daisy chain. The control board asserts RST, releases it, sends CHAIN_INACTIVE, then walks SET_CHIP_ADDR forward chip to chip on CI → CO. Every addressed chip replies up the reverse path RO → RI. check_asic_number_with_power_on counts those replies, and the count is the diagnosis:

• Non-zero (“find 29 asic”, “lacks chips”): chip 1 answered and the chain broke after the last chip counted; you bisect for the break point.
• Zero: chip 1 never answered, so nothing behind it matters. The fault is at the head of the board or board-wide — no board power, no boosted rail, no 25 MHz clock, a stuck reset, a missing 3.3 V logic feed, a broken signal cable, or a shorted first chip.

Pull the log to text first (how to copy the kernel log). If that chain also throws temp-sensor errors, suspect the cable: the I²C sensor pair rides the same 18-pin ribbon as RST, CI/RO and VCC_3V3.

Likely causes, most common first

1. Signal cable or connector. One open conductor or corroded pin in that 18-pin ribbon gives exactly zero chips from a perfectly healthy board.
2. The board never got power. The APW9+ (14.5–21 V DC, 200 A, 3,600 W @ 220 V) feeds each board its own DC rail. A loose lead, a dead PSU output or a failed boost stage all read as find 0 asic, with no domain voltages.
3. Power/voltage controller failure. If the board’s power controller dies or its programming is corrupt, the domains never come up: 0 chips, no 3.3 V output. Measure 3.3 V at the controller before condemning the chain.
4. Crystal / clock. Y1 is a 25 MHz crystal. No CLK, no running chips, no replies — a zero-chip board with every rail healthy.
5. Shorted BM1397 at the head of the chain. A shorted chip collapses its domain voltage and can drag the signal lines with it, taking the whole chain dark.
6. Level shifter at the board edge. The shifters translate between the control board’s 3.3 V logic and the chain’s native levels; a dead one silences the chain even with healthy rails and clock.

Diagnose before you desolder anything

1. Swap the ribbon cable only, board stays in its slot. Error clears, or error follows the cable → it was the cable.
2. Then swap the whole board (with a known-good cable) into a known-good slot. If find 0 asic follows the board to the new chain index, the fault is on the hash board. If it stays on the original index with a healthy board fitted, the fault is that slot’s control-board port or DC feed.
3. Confirm the DC feed and the mains. APW9/APW9+ do run on 110/120 V despite the label, but at reduced output; a T17+ asking 2,310 W at 620 MHz sags the rail and drops boards. Run it on 200–240 V. See APW9 PSU problems and solutions.
4. Inspect at 10×. Before powering: burnt parts near the power connector and first domain, cracked crystal, solder bridges, corroded ribbon header. A corrupt EEPROM can also leave a board unrecognized by the control board — worth ruling out on a used board.

Electrical measurements

Safety, stated correctly. The board’s DC domains are 1–2 V-class rails and are not a shock hazard — the risk there is your probe shorting a rail. The mains side of the APW9+ is the real danger: its PFC capacitors hold roughly 400 V after it is unplugged, so do not open the PSU. Board work: power off, wait 30 s, anti-static mat, black probe on a ground pad — never on the heatsink.

1. Unpowered – input bus. Resistance, ground to VDD_IN. Near zero = short on the input bus (power MOSFET, boost stage, failed input cap). Stop; powering it takes out something else.
2. Unpowered – domain impedance sweep. Black on ground, red on each of the 12 domain test points. One domain far lower than its neighbours = short (chip or LDO); far higher = open (cracked joint, lifted trace).
3. Powered – board input. VDD_IN must sit inside the APW9+ window, 14.5–21 V DC. Zero here and the chain is innocent; the fault is upstream (see “error power lost” on T17 hardware).
4. Powered – logic rail and boost. 3.3 V at the signal connector (absent = cable or control board, not the chain). Then the boost output capacitor: good VDD_IN with a dead boost output points at the MOSFET, the inductor or the boost controller.
5. Powered – domain voltages. A healthy board reads all 12 domains at the same voltage. Compare them against each other, not a spec number: one clearly below its neighbours is a short (chip or LDO); one clearly above is an open. Voltage is regulated per domain, not per chip — one bad chip takes its whole domain with it.
6. Scope – CLK at chip 1. Clean 25 MHz square wave. A missing clock with good rails is a dead crystal or a broken clock trace.
7. Scope – CI and RO at chip 1 during boot: the 0x55 0xAA preamble should arrive on CI. Commands present on CI with RO silent narrows it to chip 1, its domain, or the edge shifter.

Board-level repair

• Reflow before you replace. A live chip with a cold joint on CO, CLKO or NRSTO is indistinguishable from a dead one. Reflow chip 1 and the domain-boundary passives around it, then re-run enumeration.
• No clock: replace Y1 and its loading capacitor. Dead domain: replace the failed LDO — or the boost MOSFET/inductor if the whole board is dark.
• Dead chip: the BM1397 is a QFN-34 part — hot air with proper bottom preheat, never an iron. Replace one, re-test, move on; shotgunning chips into a board with a shorted head domain just burns parts.

Verify the fix

1. Power on and read the kernel log again: all three chains must enumerate to the same ASIC count. Two matching chains and one short by a few chips is still a broken board.
2. Run it 30–60 minutes and compare per-chain hashrate against your profile — the T17+ set spans 400 MHz / 1,150 W / 35 TH/s to 850 MHz / 3,850 W / 75 TH/s. A chain more than ~5 % under its siblings has a weak chip or a marginal domain.
3. Power-cycle cold and let it come back up warm. Cold-solder faults return on the first full thermal cycle; a board that passes once is not repaired.

Common mistakes

• Running the “lacks chips” playbook. Walking RI back from the middle domain is how you bisect a partial count. At zero, chip 1 never spoke — start at the head of the board.
• Blaming dust. Dust causes thermal faults and fan errors; it does not make a chain enumerate zero.
• Reflashing firmware first. It costs an hour and does not put a clock back on a dead crystal.

Related

• ASIC Fault Finder
• “Chain only find 0 ASIC” on the S17+ — same BM1397 chain.
• Start a repair — we rework BM1397 boards weekly.