How to fix “Chain only find 0 ASIC” on Bitmain Antminer S17+ ASICs

Chain only find 0 ASIC means bmminer opened the UART chain on that hashboard, broadcast the address-assignment command, and got zero replies: not one of the 65 BM1397 chips answered. That is an enumeration failure, not a hashrate warning: the next log line powers the board off. Three boards of 65 chips (195 total) make an S17+’s 73 TH/s, so a dead chain costs a third of the machine.

What the error actually reports

Two strings matter in the S17+ kernel log:

• check_asic_number_with_power_on: Chain[0]: find 0 asic, times 0 — the enumeration attempt.
• check_asic_number: Chain 0 only find 0 asic, will power off hash board 0 — the verdict.

Note which chain (0, 1 or 2) it is. The BM1397 chain is a daisy chain: commands travel forward (CI → CO, chip 1 → chip 65), responses travel in reverse (RO → RI, chip 65 back to the control board).

That reverse path is why this differs from lacks chips. A partial count (41 of 65, say) means the chain is alive and the break sits just after the last chip that answered (that guide is here). A flat zero means chip 1 never spoke: no clock, no domain power, no reset, a dead cable, or a chip near the head of the chain that stopped forwarding.

Likely causes, ranked

1. Cold / pseudo-soldered forwarding pins on a BM1397. A chip whose CO, CLKO, NRSTO or BO joint cracked from thermal cycling still works but stops passing the chain along — indistinguishable from a dead chip. Most common cause on this generation.
2. A shorted BM1397. It collapses its domain and pulls signal lines low — a hard zero, not a partial count.
3. Cold joints on the domain-boundary coupling resistors. The SMD resistors carrying CLK, CI and BO across a domain boundary crack like chip pins do. Cheap to fix, easy to miss: probe each side.
4. Domain power failure. The S17+ groups its BM1397s into voltage domains, each with its own LDO, stacked across the PSU rail. A shorted LDO or punctured filter cap makes the power stage current-limit; the board goes dark.
5. PIC / power-management failure. The hashboard PIC is an I2C slave that gates the board’s regulators. Dead PIC or corrupt programming and the domains never come up — the fault signature is 0 chips, no 3.3 V output.
6. Boost failure. The boost stage lifts the PSU rail into the higher band that feeds the domain LDOs. No boost output, no domains, broken chain.
7. Dead clock. Y1 is a 25 MHz crystal. If it does not oscillate, no chip initializes — a textbook flat zero.

Diagnose before you desolder anything

1. Swap the signal cable with a known-good chain. If the 0 asic follows the cable, that was it.
2. Move the board to another slot. Fault follows the board → board fault. Fault stays with the slot once the cable is cleared → suspect the control board or that PSU DC output.
3. Measure the DC rail at the board’s power connector. The APW9+ is adjustable 14.5–21 V (200 A class) and the control board commands that rail over I2C, so there is no single “correct” number: read a known-good chain and compare. Present on two boards, absent on the third → the connector or the board’s input MOS, not the PSU.

Electrical measurements

Safety. The hashboard’s domains are low-voltage DC: not a shock hazard but a short-circuit hazard — a slipped probe vaporises the tip and takes chips with it. Never rest the black probe on the heatsink. The APW9+ mains side is the real danger: hundreds of volts on its PFC capacitors after you unplug it.

No trustworthy S17+ reference table exists, and readings are meter-dependent. Baseline every reading below against a known-good S17+, never another model.

1. Domain impedance sweep, unpowered. Resistance mode, 200 Ω range. Black probe on board ground (never the heatsink), red probe on each domain VDD test point. Walk every domain. Significantly lower than the known-good board = short; significantly higher = open (cracked joint, lifted pad, broken trace).
2. Signal continuity, unpowered. At the CLK, CI, RO, BI and RST test points at each domain boundary, flip the polarity: red probe on ground, black probe on the test point, the opposite of the domain sweep above. Reverse it and the readings will not compare.
3. Powered on a fixture, sweep every domain voltage. Allow 2–5 minutes to stabilise. A healthy board holds every domain within ±50 mV of the others. 100 mV or more below average is a partial short (failed chip or blown cap); well above average is an open.
4. Boost output. Absent output means the boost IC, its MOSFET or its inductor. Compare against a known-good S17+, never another model.
5. PIC 3.3 V output. Probe the PIC’s 3.3 V output pin. Absent → PIC failure or corrupted programming, and the domains never come up.
6. Powered signal check at the head of the chain. CLK sits at 0.8 ±0.1 V (25 MHz square wave on a scope); RST, RX/RI and TX/CO swing 0–1.55 V on this generation; BI/BO idles near 0 V and pulses. Dead CLK at chip 1 → go straight to Y1 and its loading cap.
7. Bisect the reverse path. RI/RO runs backwards: probe RI at a mid-board domain boundary. Present → the break lies between there and the IO connector; dead → further out toward chip 65.

Board-level repair

• Reflow before you replace. Off signal readings on a chip that is not shorted usually mean a pseudo-solder joint: flux, reflow once. Replace only if a second reflow fails or the node under it reads shorted; bench-test the replacement BM1397 first.
• Replace the LDO or filter cap when the fault is a domain short rather than a chip, and confirm the other chips sharing that domain survived before re-powering.
• Do not cross-flash the PIC between models. It holds the board’s calibration data — frequency and operating-voltage parameters — so another model’s image loads the wrong calibration for your chips.

Verify the fix

1. Re-run the fixture from PT1 (chip enumeration) — a repaired board restarts at PT1, never mid-sequence. You want 65 of 65, cold, first attempt. 64 is a fail.
2. Run PT2 (pattern test), then PT3 (frequency sweep). A chip that enumerates but drifts under frequency comes back as a hashrate fault.
3. Reinstall and read the kernel log: Chain[0]: find 65 asic on all three chains, no power-off line.

Common mistakes

• Using S17e or T17e values on an S17+. Different board, different reference readings — compare only against a known-good board of the same model.
• Hunting for a “bad chip’s voltage.” The S17+ regulates per domain, not per chip — several chips share one rail. Measure the domain, then find the chip inside it.
• Replacing the PSU because one chain reads zero. Three boards, one APW9+. If chains 1 and 2 enumerate 65/65, the PSU is fine.

Related

• Reading the S17-series kernel log
• “Hashboard voltage is inconsistent”
• The same fault on the T17+
• ASIC Fault Finder, repair parts, or send us the board.