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How to fix “Chain lacks chips” on Bitmain Antminer S17 ASICs

Start with safety and logs

Power down before opening a miner, label cables before moving boards, and capture logs before repeated reboots erase useful evidence. Record model, firmware, pool, uptime, fan speed, temperature, reject rate, chain count, and the exact error text.

Confirm the fault class

Separate configuration faults from hardware faults first. Pool errors, DNS failures, bad worker names, overheating, weak power, fan faults, and missing hashboards can look similar from the dashboard but require different fixes.

Document the test path

Change one variable at a time and keep the before/after result. Note cable swaps, PSU swaps, firmware changes, pool changes, fan replacements, ambient temperature, and whether the fault follows a hashboard, control board, network, or power source.

When to escalate

Escalate to professional repair when there is a burned smell, melted connector, breaker trip, corrosion, repeated hashboard loss, liquid exposure, or a board-level fault that returns after a basic cable, power, firmware, and airflow check.

After the fix

Run the miner long enough to confirm stable accepted hashrate, fan behavior, chip temperature, reject rate, and pool-side reporting. A dashboard that looks normal for five minutes is not enough evidence for a recurring power, heat, or hashboard fault.

· D-Central · ⏱ 5 min read

Last updated:

Each Antminer S17 Pro hashboard carries 48 BM1397 ASICs — 144 across the three chains. Chain lacks chips means boot-time enumeration found fewer than 48 chips, so the firmware refuses the board and cuts its power. The chain is not degraded, it is off: on the low-power profile_400_38T (400 MHz, 38 TH) a chain is worth 12.7 TH/s; at stock profile_550_53T (550 MHz, 53 TH), 17.7 TH/s. One flagged board costs you a third of the machine.

What the error actually reports

The BM1397s are daisy-chained. Commands run forward (CICO) from chip 1 to chip 48, responses return in reverse (RORI); CLK, BI/BO and RST propagate chip-to-chip. A chip that dies open stops forwarding, so every chip downstream of it goes invisible. The count is therefore usually not “one missing” — it is 31, or 12 — and the break sits at the chip immediately after the last one detected.

Read the count, not the banner — over the CGMiner API (TCP 4028):

  • chain_acn1 / chain_acn2 / chain_acn3 — ASICs found per chain. A healthy S17 Pro reports 48, 48, 48.
  • chain_acs1 — per-chip status: o = detected, x = missing. Count the os to find the chip where the chain stops. The board is 12 domains of 4 chips, so dividing that chip number by 4 gives the domain — a break landing on a multiple of 4 points at a domain boundary.
  • chain_vol1 / chain_vol2 / chain_vol3 — chain voltage. Compare the three chains against each other, not against an absolute number.

In the kernel log, read the per-chain chip count, not the power-off banner that follows it — the firmware kills any board that comes up short, and the banner says nothing about why. If the count is 0 rather than partial, this is the wrong guide — work “Chain find 0 asic” on the S17 instead.

Likely causes, ranked

  1. One BM1397 failed open. The chain breaks at chip N; chips N+1 through 48 vanish. Most common.
  2. Live chip, dead forwarding. Cold solder on a CO, CLKO or NRSTO pin. The die works; it just stops passing the chain along.
  3. Domain-edge fault. A cold joint on the SMD resistors or 100 nF caps carrying CLK / CI / BO across a domain boundary, or a dead domain regulator whose 4 chips never initialise. Tell-tale for both: the count stops on a multiple of 4.
  4. Ribbon cable or connector — bent pin, corrosion, a cable seated a row off. Free to rule out; do it first.
  5. Starved chain. The APW9 (S17 / S17 Pro / T17) delivers 14.5–21 V DC; the chain runs ~18.5 V across 12 domains (~1.55 V each). Chain voltage on the S17 does not change with the frequency profile — the autotuner varies frequency, not chain voltage. An APW9 will run on 110/120 V at reduced output; on that feed, confirm the chain holds target under load before condemning a board.

Diagnose before you desolder anything

  1. Move the cable. Swap the suspect chain’s signal cable with one that enumerates 48. If the fault follows the cable, you are done.
  2. Move the board. Fault follows the board → it is the board. Fault stays on the chain position → control board or cable.
  3. Reseat and inspect at 10x — bent pins, burnt chips, missing SMD parts, cracked traces near where the count stopped.
  4. Log the count across three cold boots. A varying count (31, 48, 12) is a cracked solder joint that opens warm; an identical count every boot is a hard break.

Electrical measurements

Safety, stated correctly: the hashboard’s DC domains are low-voltage and are not a shock hazard. They are a short hazard — the black probe goes on a board ground pad, never on the heatsink. What can hurt you is the PSU: an APW9’s mains side holds hundreds of volts on its PFC capacitors after you unplug it. Do not open it.

  1. Unpowered, 200 Ω range: ground to each domain’s VDD test point in turn. All 12 should read consistently — markedly low is a short in that domain, markedly high an open. Near zero at the main power input is a short on the power bus; fix that first.
  2. Powered on a fixture, domain sweep: the 12 domains sit in series, so each should sit at ~1.55 V (12 × 1.55 V = the ~18.5 V chain). Four chips sit in series inside the domain, putting the BM1397 core near 0.39 V. Domains within ±50 mV of each other are healthy; one 100 mV+ low is a partial short; one distinctly high is an open. Chain voltage is set once per board by the dsPIC33EP16GS202 controller over I2C; the domain voltages fall out of the series-stacked domains and their LDOs — there is no per-chip voltage rail, and per-chip tuning on an S17 varies frequency, not voltage. Several domains out of family → work hashboard voltage is inconsistent first.
  3. Powered, signals: probe CLK, CI/CO, RI/RO, BI/BO and RST at the last detected chip, then at the first missing one. Signal present on a chip’s input and absent on its output names that chip.
  4. Narrow it by dichotomy. Short the RO test point to the domain voltage test point at the chain midpoint (chip 24) and re-enumerate. More chips → the fault is after the midpoint; same or fewer → before it. Halve again until you land on the chip.

Board-level repair

  • Re-solder before you replace. When the chip is alive but not forwarding, the fault is the joint, not the die: hot air, flux, reflow the pads under the identified BM1397, then re-enumerate. The BM1397 is a QFN-34 — you are re-wetting pads, not reballing a BGA. Replace only once the probe or dichotomy search has named the chip.
  • Chase the passives when the count stopped on a multiple of 4: the CLK series resistor, the CI / BO resistors and the 100 nF CLKO cap at that domain edge are likelier than the chip. If the domain is dead, replace its regulator and filter caps, then check the four chips it feeds.
  • BM1397 dies and S17 board components are in ASIC repair parts.

Verify the fix

  1. chain_acn reads 48 on all three chains, chain_acs shows all o and no x, and the three chain_vol readings agree.
  2. The chain tracks its ideal rate — roughly 12.7 TH/s on profile_400_38T, or 17.7 TH/s at stock profile_550_53T. Enumerating 48 but hashing far under ideal means a weak chip, not a missing one.
  3. Run it an hour warm, heatsinks and fans on, then re-read the count; thermal faults only appear hot.

Common mistakes

  • Replacing the chip the count stopped on. The last chip that answered is the last good chip. Your suspect is the next one.
  • Reflashing firmware to “fix” it. Enumeration is a hardware count; firmware cannot change how many chips answer.
  • Swapping in an S17+ / S17e board — different PSU (APW9 vs APW9+), different board revision. Check the hashboard silkscreen and reported board version first: these boards are not interchangeable.

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Reviewed by D-Central's mining hardware and ASIC repair editorial team for practical accuracy, buyer risk, repair context, and operational assumptions. Verify current hardware price, stock, network difficulty, BTC price, power rate, shipping, tax, firmware, and device condition before buying, hosting, repairing, or retiring mining hardware.