ASIC Hashboard Architecture Reference
Quick answer
This matrix maps 9 Bitcoin ASIC miner models to the physical build of their hash board — one row per model: ASIC chip, chips per board, boards per unit, total chips, voltage DOMAINS per board, chips per domain, the per-DOMAIN rail voltage (NOT per-chip — per-chip equals the domain rail divided by chips-per-domain), boost output, PIC presence and reference designator, EEPROM refdes, temperature-sensor count, crystal, stock PSU, level shifters and the common chain-break signature. For example an Antminer S19 carries 76 BM1398 chips across 3 boards (228 total) in 38 domains of 2 chips at ~0.36V per domain, PIC U3, EEPROM U5; an S21 carries 108 BM1368 chips in 12 domains of 9 chips at ~1.2V per domain with no PIC.
Use it to identify a board before you diagnose or order parts. Free CSV/JSON under CC BY 4.0. Component reference designators vary by board revision — verify against the specific board. Voltage figures are per voltage domain, never per chip.
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Antminer S9 BM1387
S9 (BM1387 generation) · Bitmain
| Chips per board | 63 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 189 |
| Voltage domains/board | 21 |
| Chips per domain | 3 |
| Per-DOMAIN rail (V) | 0.40 |
| Boost output (V) | unverified (no discrete boost stage documented; the 21 domains stack in series to ~8.4V from the ~12V PSU rail) |
| PIC present | yes |
| PIC refdes | unverified (per-board PIC addressed on I2C at 0x50 + (chain−1); S9 uses chains 6/7/8) |
| EEPROM refdes | unverified (no EEPROM populated on the live-probed S9 at 0x50–0x54) |
| Temp sensors | unverified |
| Crystal | 25 MHz |
| Stock PSU | APW3++ / APW7 |
| Level shifters | yes (3.3V↔chip-level UART; count unverified) |
Chain-break signature: Fixture reports fewer than 63 chips on a chain; the break is the chip immediately after the last detected chip (a dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO, so every chip downstream goes invisible).
Confidence: high on chip/domain/PSU; medium overall (board-level refdes not enumerated for S9 in the Bible)
Source: HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5; ANTMINER_ARCHITECTURE.md (S9 I2C / control board)
Antminer S17 / T17 BM1393
S17 (BM1393 generation) · Bitmain
| Chips per board | 48 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 144 |
| Voltage domains/board | 12 |
| Chips per domain | 4 |
| Per-DOMAIN rail (V) | 1.55 |
| Boost output (V) | unverified (APW9 supplies 14.5–21V directly; the ~18.5V domain stack may run without a discrete boost) |
| PIC present | yes |
| PIC refdes | unverified (PIC was removed only at the BM1368/S21 generation, so the BM1393 board still carries one; refdes not enumerated in the Bible) |
| EEPROM refdes | unverified |
| Temp sensors | unverified |
| Crystal | 25 MHz |
| Stock PSU | APW9 |
| Level shifters | yes (count unverified) |
Chain-break signature: Fixture reports fewer than 48 chips on a chain; the break is the chip immediately after the last detected chip (open/short chip stops forwarding the daisy-chain signals; all downstream chips go invisible).
Confidence: medium. The figures are the Bible's S17 BM1393 reference; the T17 shares the BM1393 platform but its model-specific chip count is not separately enumerated in the Bible.
Source: HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5; PSU_PROTOCOL_BIBLE.md §1 (APW9 → S17/S17 Pro/T17)
Antminer S19 BM1398
S19 (BM1398 generation) · Bitmain
| Chips per board | 76 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 228 |
| Voltage domains/board | 38 |
| Chips per domain | 2 |
| Per-DOMAIN rail (V) | 0.36 |
| Boost output (V) | 19 (14V boost input → 19V; LDO chain 19V → 1.8V → 0.8V per domain) |
| PIC present | yes |
| PIC refdes | U3 (PIC16F1704) |
| EEPROM refdes | U5 |
| Temp sensors | 4 (U4, U6, U7, U8) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW12 |
| Level shifters | U1, U2 (2) |
Chain-break signature: Fixture reports fewer than 76 chips on a chain; the break is the chip immediately after the last detected chip (e.g. 29 of 76 detected → fault at chip 30). A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.
Confidence: high
Source: HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.1
Antminer S19 Pro BM1398
S19 (BM1398 generation) · Bitmain
| Chips per board | 114 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 342 |
| Voltage domains/board | 38 |
| Chips per domain | 3 |
| Per-DOMAIN rail (V) | 0.32 |
| Boost output (V) | 20 (12.6V → 20V via Q9; domains 38–32 LDO off the 19V boost, domains 31–1 LDO off VDD12.6V → 1.8V) |
| PIC present | yes |
| PIC refdes | U6 (PIC16F1704) |
| EEPROM refdes | U10 |
| Temp sensors | 4 (U5, U7, U8, U9) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW12 |
| Level shifters | U1, U2 (2) |
Chain-break signature: Fixture reports fewer than 114 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.
Confidence: high
Source: HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.1
Antminer S19j Pro BM1398
S19 (BM1398 generation) · Bitmain
| Chips per board | 126 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 378 |
| Voltage domains/board | 42 |
| Chips per domain | 3 |
| Per-DOMAIN rail (V) | 0.30 |
| Boost output (V) | 19 |
| PIC present | yes |
| PIC refdes | unverified (present per §12.1; refdes not enumerated) |
| EEPROM refdes | unverified (present per §12.1; refdes not enumerated) |
| Temp sensors | 4 (refdes not enumerated) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW12 |
| Level shifters | U1, U2 (2) |
Chain-break signature: Fixture reports fewer than 126 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.
Confidence: high on counts; medium on refdes
Source: HASHBOARD_DIAGNOSTICS.md §1.2, §2.2, §3.5, §12.1
Antminer S19 XP BM1366
S19 XP (BM1366 generation) · Bitmain
| Chips per board | 110 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 330 |
| Voltage domains/board | 11 |
| Chips per domain | 10 |
| Per-DOMAIN rail (V) | ~0.4 |
| Boost output (V) | 19 |
| PIC present | yes |
| PIC refdes | unverified (PIC microcontroller present as I2C slave managing the regulators; refdes not enumerated) |
| EEPROM refdes | unverified (EEPROM present, stores board identity; refdes not enumerated) |
| Temp sensors | unverified (TMP75 I2C temp sensor present; exact count not enumerated, §12.1 notes 2+ sensors) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW12 / APW171215 |
| Level shifters | yes (3.3V↔1.8V for UART; count unverified) |
Chain-break signature: Fixture reports fewer than 110 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.
Confidence: medium. Domain count 11 × 10 chips/domain is from ANTMINER_ARCHITECTURE (S19 XP hash board); HASHBOARD_DIAGNOSTICS §12.1 lists the S19 XP domain split as 'Varies'.
Source: ANTMINER_ARCHITECTURE.md (S19 XP Hash Board); HASHBOARD_DIAGNOSTICS.md §1.2, §3.5, §12.1
Antminer S21 / T21 BM1368
S21 (BM1368 generation) · Bitmain
| Chips per board | 108 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 324 |
| Voltage domains/board | 12 |
| Chips per domain | 9 |
| Per-DOMAIN rail (V) | ~1.2 |
| Boost output (V) | ~25 (VDD_IN → ~25V via U206; domains 1–10 use 3 LDOs each to 1.2V/0.8V, domains 11–12 use MP2019 bucks U166/U200 → 2V → LDOs) |
| PIC present | no |
| PIC refdes | n/a (PIC removed at the BM1368 generation) |
| EEPROM refdes | U6 |
| Temp sensors | 2 (U5 inlet, U7 outlet) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW171215a |
| Level shifters | 11 units |
Chain-break signature: Fixture reports fewer than 108 chips on a chain (e.g. 29 of 108 detected → fault at chip 30). A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.
Confidence: high. Figures are the Bible's S21/T21 BM1368 reference; the T21 shares the BM1368 hash-board platform.
Source: HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.2; ANTMINER_ARCHITECTURE.md (S21 hash board)
Antminer S21 Pro BM1370
S21 (BM1370 generation) · Bitmain
| Chips per board | unverified (§12.2 lists 'Varies') |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | unverified |
| Voltage domains/board | unverified (§12.2 lists 'Varies') |
| Chips per domain | unverified (§12.2 lists 'Varies') |
| Per-DOMAIN rail (V) | ~1.0 |
| Boost output (V) | ~21 |
| PIC present | no |
| PIC refdes | n/a (PIC removed at the BM1368/BM1370 generation) |
| EEPROM refdes | unverified (EEPROM present; refdes not enumerated) |
| Temp sensors | unverified (multiple sensors; count not enumerated) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW171215a |
| Level shifters | 12+ units |
Chain-break signature: Fixture reports fewer chips than the chain expects; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO.
Confidence: medium-low. The Bible records the S21 Pro chip/domain counts as 'Varies'; per-domain rail ~1.0V, boost ~21V and the BM1370 chip are grounded.
Source: HASHBOARD_DIAGNOSTICS.md §1.2, §3.5, §12.2
Antminer S21 XP BM1370
S21 XP (BM1370 generation) · Bitmain
| Chips per board | 91 |
|---|---|
| Boards per unit | 3 |
| Total chips per unit | 273 |
| Voltage domains/board | 13 |
| Chips per domain | 7 |
| Per-DOMAIN rail (V) | ~1.04 |
| Boost output (V) | ~21 (domains 1–11 use 1.2V/0.8V LDOs ×3 per domain, domains 12–13 use MP2019 bucks U146/U202 → 2.5V → LDOs) |
| PIC present | no |
| PIC refdes | n/a (PIC removed at the BM1368/BM1370 generation) |
| EEPROM refdes | unverified (EEPROM present; refdes not enumerated) |
| Temp sensors | unverified (U19 4-way I2C switch; U20, U22 isolation ICs — discrete temp-sensor count not enumerated) |
| Crystal | 25 MHz (Y1) |
| Stock PSU | APW171215a |
| Level shifters | 12 (U1–U12) |
Chain-break signature: Fixture reports fewer than 91 chips on a chain; the break is the chip immediately after the last detected chip. A dead/open chip stops forwarding CI/CO, CLK, RST and BI/BO; all downstream chips go invisible.
Confidence: high
Source: HASHBOARD_DIAGNOSTICS.md §1.3, §2.2, §3.5, §12.2; ANTMINER_ARCHITECTURE.md (S21 XP hash board)
Voltage is per voltage domain, never per chip (per-chip = domain rail ÷ chips-per-domain). Grounded in the D-Central Mining Bible (HASHBOARD_DIAGNOSTICS, ANTMINER_ARCHITECTURE, PSU_PROTOCOL_BIBLE) — a reference, not a guarantee; reference designators vary by board revision. Pairs with the ASIC chip reference, the ASIC chip spec cards, the power & connector pinout reference and the model hubs (S21, S19, S23). Got a dead board? Start a repair →
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Last reviewed June 23, 2026.